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Message-ID: <TYWPR01MB8775831C81B7153DB24F86C2C23BA@TYWPR01MB8775.jpnprd01.prod.outlook.com>
Date: Mon, 17 Jul 2023 10:44:47 +0000
From: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
To: Andy Shevchenko <andy.shevchenko@...il.com>
CC: Mark Brown <broonie@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
"linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH 06/10] spi: rzv2m-csi: Squash timing settings into one
statement
Hi Andy,
Thanks for your reply.
> From: Andy Shevchenko <andy.shevchenko@...il.com>
> Subject: Re: [PATCH 06/10] spi: rzv2m-csi: Squash timing settings into
> one statement
>
> On Sat, Jul 15, 2023 at 4:04 AM Fabrizio Castro
> <fabrizio.castro.jz@...esas.com> wrote:
> >
> > Register CLKSEL hosts the configuration for both clock polarity
> > and data phase, and both values can be set in one write operation.
> >
> > Squash the clock polarity and data phase register writes into
> > one statement, for efficiency.
>
> ...
>
> > /* Setup clock polarity and phase timing */
> > - rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_CKP,
> > - !(spi->mode & SPI_CPOL));
> > - rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_DAP,
> > - !(spi->mode & SPI_CPHA));
> > + rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_MODE,
> > + ~spi->mode & SPI_MODE_X_MASK);
>
> I think this now regresses due to the absence of parentheses.
This looks okay to me. CSI_CLKSEL_CKP needs to contain the inverted value
of SPI_CPOL, and CSI_CLKSEL_DAP needs to contain the inverted value of
SPI_CPHA, and that happens with both use cases.
Thanks,
Fab
>
> --
> With Best Regards,
> Andy Shevchenko
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