linux-kernel - Re: [PATCH v8 3/4] arm64: dts: qcom: sm6115: Add EUD dt node and dwc3 connector

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <ZLUbyocjNT2bGvVt@gerhold.net>
Date:   Mon, 17 Jul 2023 12:45:30 +0200
From:   Stephan Gerhold <stephan@...hold.net>
To:     Bhupesh Sharma <bhupesh.sharma@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-usb@...r.kernel.org, agross@...nel.org, andersson@...nel.org,
        konrad.dybcio@...aro.org, linux-kernel@...r.kernel.org,
        bhupesh.linux@...il.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, krzysztof.kozlowski@...aro.org,
        quic_schowdhu@...cinc.com, gregkh@...uxfoundation.org
Subject: Re: [PATCH v8 3/4] arm64: dts: qcom: sm6115: Add EUD dt node and
 dwc3 connector

On Mon, Jul 17, 2023 at 04:02:35PM +0530, Bhupesh Sharma wrote:
> Add the Embedded USB Debugger(EUD) device tree node for
> SM6115 / SM4250 SoC.
> 
> The node contains EUD base register region, EUD mode manager
> register region and TCSR Base register region along with the
> interrupt entry.
> 
> [...]
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm6115.dtsi | 50 ++++++++++++++++++++++++++++
>  1 file changed, 50 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 839c603512403..db45337c1082c 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> [...]
> @@ -789,6 +801,37 @@ gcc: clock-controller@...0000 {
>  			#power-domain-cells = <1>;
>  		};
>  
> +		eud: eud@...0000 {
> +			compatible = "qcom,sm6115-eud", "qcom,eud";
> +			reg = <0x0 0x01610000 0x0 0x2000>,
> +			      <0x0 0x01612000 0x0 0x1000>,
> +			      <0x0 0x003c0000 0x0 0x40000>;
> +			reg-names = "eud-base", "eud-mode-mgr", "tcsr-base";

TCSR is a separate hardware block unrelated to the EUD. IMHO it
shouldn't be listed as "reg" here.

Typically we describe it as syscon and then reference it from other
nodes. See e.g. sm8450.dtsi "tcsr: syscon@...0000" referenced in &scm
"qcom,dload-mode = <&tcsr 0x13000>". This is pretty much exactly the
same use case as you have. It also uses this to write something with
qcom_scm_io_writel() at the end.

Thanks,
Stephan