lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230718-curfew-jumble-aeafe95c5cc7@spud>
Date:   Tue, 18 Jul 2023 16:46:42 +0100
From:   Conor Dooley <conor@...nel.org>
To:     Johan Jonker <jbx6244@...il.com>
Cc:     miquel.raynal@...tlin.com, richard@....at, vigneshr@...com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, linux-mtd@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v1 1/2] dt-bindings: mtd: nand-controller: add
 nand-skip-bbtscan and nand-no-bbm-quirk DT options

On Sat, Jul 15, 2023 at 12:48:16PM +0200, Johan Jonker wrote:
> A NAND chip can contain a different data format then the MTD framework
> expects in the erase blocks for the Bad Block Table(BBT).
> Result is a failed probe, while nothing wrong with the hardware.
> Some MTD flags need to be set to gain access again.
> 
> Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN option
> so that the original content is unchanged during the driver probe.
> The NAND_NO_BBM_QUIRK option allows us to erase bad blocks with
> the nand_erase_nand() function and the flash_erase command.
> 
> Add nand-skip-bbtscan and nand-no-bbm-quirk Device Tree options,
> so the user has the "freedom of choice" by neutral
> access mode to read and write in whatever format is needed.
> 
> Signed-off-by: Johan Jonker <jbx6244@...il.com>
> ---
> 
> Previous discussion:
> [PATCH v3 3/3] mtd: rawnand: rockchip-nand-controller: add skipbbt option
> https://lore.kernel.org/linux-mtd/1618382560.2326931.1689261435022.JavaMail.zimbra@nod.at/
> ---
>  .../devicetree/bindings/mtd/nand-controller.yaml    | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index f70a32d2d9d4..ca04d06a0377 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -103,6 +103,19 @@ patternProperties:
>            the boot ROM or similar restrictions.
>          $ref: /schemas/types.yaml#/definitions/flag
> 
> +      nand-no-bbm-quirk:
> +        description:
> +          Some controllers with pipelined ECC engines override the BBM marker with
> +          data or ECC bytes, thus making bad block detection through bad block marker
> +          impossible. Let's flag those chips so the core knows it shouldn't check the
> +          BBM and consider all blocks good.
> +        $ref: /schemas/types.yaml#/definitions/flag

While this seems okay, as it seems to describe facet of the hardware...

> +      nand-skip-bbtscan:
> +        description:
> +          This option skips the BBT scan during initialization.
> +        $ref: /schemas/types.yaml#/definitions/flag

...this seems to be used to control the behaviour of software, and does
not describe the underlying hardware.

Maybe I'm off, but the description of the property does not hint at the
aspect of the hardware that this addresses.

Thanks,
Conor.

> +
>        nand-rb:
>          description:
>            Contains the native Ready/Busy IDs.
> --
> 2.30.2
> 

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ