lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230718111759.5642b4c4ffd72ddd9c8aa29f@linux-foundation.org>
Date:   Tue, 18 Jul 2023 11:17:59 -0700
From:   Andrew Morton <akpm@...ux-foundation.org>
To:     Alistair Popple <apopple@...dia.com>
Cc:     ajd@...ux.ibm.com, catalin.marinas@....com, fbarrat@...ux.ibm.com,
        iommu@...ts.linux.dev, jgg@...pe.ca, jhubbard@...dia.com,
        kevin.tian@...el.com, kvm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mm@...ck.org, linuxppc-dev@...ts.ozlabs.org,
        mpe@...erman.id.au, nicolinc@...dia.com, npiggin@...il.com,
        robin.murphy@....com, seanjc@...gle.com, will@...nel.org,
        x86@...nel.org, zhi.wang.linux@...il.com
Subject: Re: [PATCH 3/4] mmu_notifiers: Call
 arch_invalidate_secondary_tlbs() when invalidating TLBs

On Tue, 18 Jul 2023 17:56:17 +1000 Alistair Popple <apopple@...dia.com> wrote:

> The arch_invalidate_secondary_tlbs() is an architecture specific mmu
> notifier used to keep the TLB of secondary MMUs such as an IOMMU in
> sync with the CPU page tables. Currently it is called from separate
> code paths to the main CPU TLB invalidations. This can lead to a
> secondary TLB not getting invalidated when required and makes it hard
> to reason about when exactly the secondary TLB is invalidated.
> 
> To fix this move the notifier call to the architecture specific TLB
> maintenance functions for architectures that have secondary MMUs
> requiring explicit software invalidations.
> 
> This fixes a SMMU bug on ARM64. On ARM64 PTE permission upgrades
> require a TLB invalidation. This invalidation is done by the
> architecutre specific ptep_set_access_flags() which calls
> flush_tlb_page() if required. However this doesn't call the notifier
> resulting in infinite faults being generated by devices using the SMMU
> if it has previously cached a read-only PTE in it's TLB.

This sounds like a pretty serious bug.  Can it happen in current
released kernels?  If so, is a -stable backport needed?

> Moving the invalidations into the TLB invalidation functions ensures
> all invalidations happen at the same time as the CPU invalidation. The
> architecture specific flush_tlb_all() routines do not call the
> notifier as none of the IOMMUs require this.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ