[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230718062616.2822339-1-dylan_hung@aspeedtech.com>
Date: Tue, 18 Jul 2023 14:26:16 +0800
From: Dylan Hung <kobedylan@...il.com>
To: mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: BMC-SW@...eedtech.com, kobedylan@...il.com,
Dylan Hung <dylan_hung@...eedtech.com>
Subject: [PATCH v3] dt-bindings: clock: ast2600: Add I3C and MAC reset definitions
Add reset definitions of AST2600 I3C and MAC controllers. In the case of
the I3C reset, since there is no reset-line hardware available for
`ASPEED_RESET_I3C_DMA`, a new macro `ASPEED_RESET_I3C` with the same ID
is introduced to provide a more accurate representation of the hardware.
The old macro `ASPEED_RESET_I3C_DMA` is kept to provide backward
compatibility.
Signed-off-by: Dylan Hung <dylan_hung@...eedtech.com>
---
changes in v2:
- Added back ASPEED_RESET_I3C_DMA for backward compatibility
- link to v1: https://lore.kernel.org/all/20230621094545.707-1-dylan_hung@aspeedtech.com/
changes in v3:
- Added an explaination for adding a duplicate ID in the commit message
- Link to v2: https://lore.kernel.org/all/20230717075123.1597977-1-dylan_hung@aspeedtech.com/
include/dt-bindings/clock/ast2600-clock.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h
index e149eee61588..712782177c90 100644
--- a/include/dt-bindings/clock/ast2600-clock.h
+++ b/include/dt-bindings/clock/ast2600-clock.h
@@ -90,7 +90,19 @@
/* Only list resets here that are not part of a clock gate + reset pair */
#define ASPEED_RESET_ADC 55
#define ASPEED_RESET_JTAG_MASTER2 54
+
+#define ASPEED_RESET_MAC4 53
+#define ASPEED_RESET_MAC3 52
+
+#define ASPEED_RESET_I3C5 45
+#define ASPEED_RESET_I3C4 44
+#define ASPEED_RESET_I3C3 43
+#define ASPEED_RESET_I3C2 42
+#define ASPEED_RESET_I3C1 41
+#define ASPEED_RESET_I3C0 40
+#define ASPEED_RESET_I3C 39
#define ASPEED_RESET_I3C_DMA 39
+
#define ASPEED_RESET_PWM 37
#define ASPEED_RESET_PECI 36
#define ASPEED_RESET_MII 35
--
2.25.1
Powered by blists - more mailing lists