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Message-ID: <1f400879-03e4-9a36-b6db-91f53f70a866@linaro.org>
Date: Tue, 18 Jul 2023 08:31:52 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Bhupesh Sharma <bhupesh.sharma@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-usb@...r.kernel.org
Cc: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
linux-kernel@...r.kernel.org, bhupesh.linux@...il.com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
quic_schowdhu@...cinc.com, gregkh@...uxfoundation.org,
stephan@...hold.net
Subject: Re: [PATCH v9 4/7] usb: misc: eud: Add driver support for SM6115 /
SM4250
On 18/07/2023 08:10, Bhupesh Sharma wrote:
> Add SM6115 / SM4250 SoC EUD support in qcom_eud driver.
>
> On some SoCs (like the SM6115 / SM4250 SoC), the mode manager
> needs to be accessed only via the secure world (through 'scm'
> calls).
>
> Also, the enable bit inside 'tcsr_check_reg' needs to be set
> first to set the eud in 'enable' mode on these SoCs.
>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> ---
> drivers/usb/misc/Kconfig | 2 +-
> drivers/usb/misc/qcom_eud.c | 76 ++++++++++++++++++++++++++++++++++---
> 2 files changed, 72 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig
> index 99b15b77dfd57..51eb5140caa14 100644
> --- a/drivers/usb/misc/Kconfig
> +++ b/drivers/usb/misc/Kconfig
> @@ -146,7 +146,7 @@ config USB_APPLEDISPLAY
>
> config USB_QCOM_EUD
> tristate "QCOM Embedded USB Debugger(EUD) Driver"
> - depends on ARCH_QCOM || COMPILE_TEST
> + depends on (ARCH_QCOM && QCOM_SCM) || COMPILE_TEST
> select USB_ROLE_SWITCH
> help
> This module enables support for Qualcomm Technologies, Inc.
> diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c
> index 7f371ea1248c3..a5b28fc24116a 100644
> --- a/drivers/usb/misc/qcom_eud.c
> +++ b/drivers/usb/misc/qcom_eud.c
> @@ -11,9 +11,12 @@
> #include <linux/kernel.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/slab.h>
> #include <linux/sysfs.h>
> +#include <linux/firmware/qcom/qcom_scm.h>
> #include <linux/usb/role.h>
>
> #define EUD_REG_INT1_EN_MASK 0x0024
> @@ -30,6 +33,10 @@
> #define EUD_INT_SAFE_MODE BIT(4)
> #define EUD_INT_ALL (EUD_INT_VBUS | EUD_INT_SAFE_MODE)
>
> +#define EUD_EN2_EN BIT(0)
> +#define EUD_EN2_DISABLE (0)
> +#define TCSR_CHECK_EN BIT(0)
> +
> struct eud_chip {
> struct device *dev;
> struct usb_role_switch *role_sw;
> @@ -39,6 +46,7 @@ struct eud_chip {
> int irq;
> bool enabled;
> bool usb_attached;
> + phys_addr_t secure_mode_mgr;
> };
>
> static int enable_eud(struct eud_chip *priv)
> @@ -46,7 +54,11 @@ static int enable_eud(struct eud_chip *priv)
> writel(EUD_ENABLE, priv->base + EUD_REG_CSR_EUD_EN);
> writel(EUD_INT_VBUS | EUD_INT_SAFE_MODE,
> priv->base + EUD_REG_INT1_EN_MASK);
> - writel(1, priv->mode_mgr + EUD_REG_EUD_EN2);
> +
> + if (priv->secure_mode_mgr)
> + qcom_scm_io_writel(priv->secure_mode_mgr + EUD_REG_EUD_EN2, EUD_EN2_EN);
> + else
> + writel(EUD_EN2_EN, priv->mode_mgr + EUD_REG_EUD_EN2);
>
> return usb_role_switch_set_role(priv->role_sw, USB_ROLE_DEVICE);
> }
> @@ -54,7 +66,11 @@ static int enable_eud(struct eud_chip *priv)
> static void disable_eud(struct eud_chip *priv)
> {
> writel(0, priv->base + EUD_REG_CSR_EUD_EN);
> - writel(0, priv->mode_mgr + EUD_REG_EUD_EN2);
> +
> + if (priv->secure_mode_mgr)
> + qcom_scm_io_writel(priv->secure_mode_mgr + EUD_REG_EUD_EN2, EUD_EN2_DISABLE);
> + else
> + writel(EUD_EN2_DISABLE, priv->mode_mgr + EUD_REG_EUD_EN2);
> }
>
> static ssize_t enable_show(struct device *dev,
> @@ -175,9 +191,37 @@ static void eud_role_switch_release(void *data)
> usb_role_switch_put(chip->role_sw);
> }
>
> +static int eud_find_secure_reg_addr(struct device *dev, u64 *addr)
> +{
> + struct device_node *tcsr;
> + struct device_node *np = dev->of_node;
> + struct resource res;
> + u32 offset;
> + int ret;
> +
> + tcsr = of_parse_phandle(np, "qcom,secure-eud-reg", 0);
> + if (!tcsr)
> + return 0;
> +
> + ret = of_address_to_resource(tcsr, 0, &res);
> + of_node_put(tcsr);
> + if (ret)
> + return ret;
> +
> + ret = of_property_read_u32_index(np, "qcom,secure-eud-reg", 1, &offset);
> + if (ret < 0)
> + return ret;
> +
> + *addr = res.start + offset;
> +
> + return 0;
> +}
> +
> static int eud_probe(struct platform_device *pdev)
> {
> struct eud_chip *chip;
> + struct resource *res;
> + phys_addr_t tcsr_check = 0;
> int ret;
>
> chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
> @@ -200,9 +244,30 @@ static int eud_probe(struct platform_device *pdev)
> if (IS_ERR(chip->base))
> return PTR_ERR(chip->base);
>
> - chip->mode_mgr = devm_platform_ioremap_resource(pdev, 1);
> - if (IS_ERR(chip->mode_mgr))
> - return PTR_ERR(chip->mode_mgr);
> + /*
> + * EUD block on a few Qualcomm SoCs needs secure register access.
> + * Check for the same via vendor-specific dt property.
> + */
> + ret = eud_find_secure_reg_addr(&pdev->dev, &tcsr_check);
> + if (ret < 0)
> + return ret;
> +
> + if (tcsr_check) {
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
I don't understand this code. If you have syscon to eud reg, then why
you are not using it, but instead map again second address space?
> + if (!res)
> + return dev_err_probe(chip->dev, -ENODEV,
> + "failed to get secure_mode_mgr reg base\n");
> +
> + chip->secure_mode_mgr = res->start;
> +
> + ret = qcom_scm_io_writel(tcsr_check, TCSR_CHECK_EN);
That's not how syscon is used. Your bindings defined it as syscon, so
are you sure you are using it correctly?
Best regards,
Krzysztof
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