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Message-ID: <20230718120501.3205661-7-quic_mmanikan@quicinc.com>
Date: Tue, 18 Jul 2023 17:34:56 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: <agross@...nel.org>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <mathieu.poirier@...aro.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <mturquette@...libre.com>,
<sboyd@...nel.org>, <quic_eberman@...cinc.com>, <kvalo@...nel.org>,
<quic_mmanikan@...cinc.com>, <loic.poulain@...aro.org>,
<linux-arm-msm@...r.kernel.org>,
<linux-remoteproc@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_sjaganat@...cinc.com>,
<quic_kathirav@...cinc.com>, <quic_anusha@...cinc.com>
Subject: [V3,06/11] firmware: qcom_scm: ipq5332: add support to pass metadata size
IPQ5332 security software running under trustzone
requires metadata size. With V2 cmd, pass metadata
size as well.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
---
drivers/firmware/qcom_scm.c | 8 ++++++++
drivers/firmware/qcom_scm.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index fde33acd46b7..5553201e4599 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -499,6 +499,14 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
desc.args[1] = mdata_phys;
+ if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL,
+ QCOM_SCM_PAS_INIT_IMAGE_V2)) {
+ desc.cmd = QCOM_SCM_PAS_INIT_IMAGE_V2;
+ desc.arginfo =
+ QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_RW, QCOM_SCM_VAL);
+ desc.args[2] = size;
+ }
+
ret = qcom_scm_call(__scm->dev, &desc, &res);
qcom_scm_bw_disable();
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index e6e512bd57d1..6ab5e7c77e8d 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -91,6 +91,7 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
#define QCOM_SCM_SVC_PIL 0x02
#define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01
+#define QCOM_SCM_PAS_INIT_IMAGE_V2 0x1a
#define QCOM_SCM_PIL_PAS_MEM_SETUP 0x02
#define QCOM_SCM_PIL_PAS_AUTH_AND_RESET 0x05
#define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06
--
2.34.1
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