[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230719174015.68153-2-sebastian.reichel@collabora.com>
Date: Wed, 19 Jul 2023 19:40:14 +0200
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Heiko Stuebner <heiko@...ech.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-rockchip@...ts.infradead.org, linux-usb@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Sebastian Reichel <sebastian.reichel@...labora.com>,
kernel@...labora.com
Subject: [PATCH v1 1/2] dt-bindings: usb: rockchip,dwc3: Add RK3588 binding
RK3588 contains three DWC3 cores. Two of them are connected to
dedicated USBDP PHY and can be used in dual-role. The third is
connected to one of the shared combo PHYs used for PCIe/SATA/USB3
and can only be used in host mode. Since the binding is all about
the PHY glueing and involved clocks, separate compatible values
have been created for these two types.
Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
---
.../bindings/usb/rockchip,rk3399-dwc3.yaml | 107 ++++++++++++++----
1 file changed, 85 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml
index 3159f9a6a0f7..0db4dc86e506 100644
--- a/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml
@@ -11,7 +11,13 @@ maintainers:
properties:
compatible:
- const: rockchip,rk3399-dwc3
+ oneOf:
+ - items:
+ - enum:
+ - rockchip,rk3588-dwc3-otg
+ - rockchip,rk3588-dwc3-host
+ - const: rockchip,rk3399-dwc3
+ - const: rockchip,rk3399-dwc3
'#address-cells':
const: 2
@@ -22,35 +28,37 @@ properties:
ranges: true
clocks:
- items:
- - description:
- Controller reference clock, must to be 24 MHz
- - description:
- Controller suspend clock, must to be 24 MHz or 32 KHz
- - description:
- Master/Core clock, must to be >= 62.5 MHz for SS
- operation and >= 30MHz for HS operation
- - description:
- USB3 aclk peri
- - description:
- USB3 aclk
- - description:
- Controller grf clock
+ minItems: 3
+ maxItems: 6
clock-names:
items:
- - const: ref_clk
- - const: suspend_clk
- - const: bus_clk
- - const: aclk_usb3_rksoc_axi_perf
- - const: aclk_usb3
- - const: grf_clk
+ oneOf:
+ - enum:
+ - ref
+ - ref_clk
+ - enum:
+ - suspend
+ - suspend_clk
+ - enum:
+ - bus
+ - bus_clk
+ - const: aclk_usb3_rksoc_axi_perf
+ - const: aclk_usb3
+ - const: grf_clk
+ - const: utmi
+ - const: php
+ - const: pipe
+ minItems: 3
+ maxItems: 6
resets:
maxItems: 1
reset-names:
- const: usb3-otg
+ enum:
+ - usb3-host
+ - usb3-otg
patternProperties:
'^usb@':
@@ -68,6 +76,61 @@ required:
- resets
- reset-names
+allOf:
+ - if:
+ properties:
+ compatible:
+ const: rockchip,rk3399-dwc3
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ clock-names:
+ items:
+ - const: ref_clk
+ - const: suspend_clk
+ - const: bus_clk
+ - const: aclk_usb3_rksoc_axi_perf
+ - const: aclk_usb3
+ - const: grf_clk
+ reset-names:
+ const: usb3-otg
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3588-dwc3-otg
+ then:
+ properties:
+ clocks:
+ maxItems: 3
+ clock-names:
+ items:
+ - const: ref
+ - const: suspend
+ - const: bus
+ reset-names:
+ const: usb3-otg
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3588-dwc3-host
+ then:
+ properties:
+ clocks:
+ minItems: 6
+ clock-names:
+ items:
+ - const: ref
+ - const: suspend
+ - const: bus
+ - const: utmi
+ - const: php
+ - const: pipe
+ reset-names:
+ const: usb3-host
+
examples:
- |
#include <dt-bindings/clock/rk3399-cru.h>
--
2.40.1
Powered by blists - more mailing lists