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Message-ID: <CAGETcx9zAF2ipO0s-6-zjyvn1JWt7OUS9G=cQ6OwyOPuqh-pBA@mail.gmail.com>
Date: Wed, 19 Jul 2023 15:14:51 -0700
From: Saravana Kannan <saravanak@...gle.com>
To: Anup Patel <apatel@...tanamicro.com>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Frank Rowand <frowand.list@...il.com>,
Conor Dooley <conor+dt@...nel.org>,
Atish Patra <atishp@...shpatra.org>,
Andrew Jones <ajones@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Anup Patel <anup@...infault.org>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v6 03/14] drivers: irqchip/riscv-intc: Mark all INTC nodes
as initialized
On Wed, Jul 19, 2023 at 4:36 AM Anup Patel <apatel@...tanamicro.com> wrote:
>
> The RISC-V INTC local interrupts are per-HART (or per-CPU) so
> we create INTC IRQ domain only for the INTC node belonging to
> the boot HART. This means only the boot HART INTC node will be
> marked as initialized and other INTC nodes won't be marked which
> results downstream interrupt controllers (such as IMSIC and APLIC
> direct-mode) not being probed due to missing device suppliers.
>
> To address this issue, we mark all INTC node for which we don't
> create IRQ domain as initialized.
>
> Signed-off-by: Anup Patel <apatel@...tanamicro.com>
> ---
> drivers/irqchip/irq-riscv-intc.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
> index 65f4a2afb381..4e2704bc25fb 100644
> --- a/drivers/irqchip/irq-riscv-intc.c
> +++ b/drivers/irqchip/irq-riscv-intc.c
> @@ -155,8 +155,16 @@ static int __init riscv_intc_init(struct device_node *node,
> * for each INTC DT node. We only need to do INTC initialization
> * for the INTC DT node belonging to boot CPU (or boot HART).
> */
> - if (riscv_hartid_to_cpuid(hartid) != smp_processor_id())
> + if (riscv_hartid_to_cpuid(hartid) != smp_processor_id()) {
> + /*
> + * The INTC nodes of each CPU are suppliers for downstream
> + * interrupt controllers (such as IMSIC and APLIC direct-mode)
> + * so we should mark an INTC node as initialized if we are
> + * not creating IRQ domain for it.
> + */
I'm a bit confused by this. If those non-boot CPUs INTC doesn't have
an IRQ domain, why are the downstream interrupt controllers listing
these non-boot CPU INTCs as an upstream interrupt controller?
This is more of a question of the existing behavior that this patch,
but this patch highlights the existing oddity.
-Saravana
> + fwnode_dev_initialized(of_fwnode_handle(node), true);
> return 0;
> + }
>
> return riscv_intc_init_common(of_node_to_fwnode(node));
> }
> --
> 2.34.1
>
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