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Message-ID: <CAH2o1u4q1=cKz7yFxKWrP2goypsxTxusYV_aSD-Os33bDZwepQ@mail.gmail.com>
Date: Thu, 20 Jul 2023 10:30:14 -0700
From: Tomasz Jeznach <tjeznach@...osinc.com>
To: Baolu Lu <baolu.lu@...ux.intel.com>
Cc: Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <apatel@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Nick Kossifidis <mick@....forth.gr>,
Sebastien Boeuf <seb@...osinc.com>, iommu@...ts.linux.dev,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux@...osinc.com
Subject: Re: [PATCH 01/11] RISC-V: drivers/iommu: Add RISC-V IOMMU - Ziommu support.
On Thu, Jul 20, 2023 at 5:31 AM Baolu Lu <baolu.lu@...ux.intel.com> wrote:
>
> On 2023/7/20 3:33, Tomasz Jeznach wrote:
> > +static void riscv_iommu_iotlb_sync_map(struct iommu_domain *iommu_domain,
> > + unsigned long iova, size_t size)
> > +{
> > + unsigned long end = iova + size - 1;
> > + /*
> > + * Given we don't know the page size used by this range, we assume the
> > + * smallest page size to ensure all possible entries are flushed from
> > + * the IOATC.
> > + */
> > + size_t pgsize = PAGE_SIZE;
> > + riscv_iommu_flush_iotlb_range(iommu_domain, &iova, &end, &pgsize);
> > +}
>
> Does RISC-V IOMMU require to invalidate the TLB cache after new mappings
> are created?
>
No. Only on unmapping / permission change.
Thanks for pointing this out.
> Best regards,
> baolu
regards,
- Tomasz
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