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Message-ID: <be0893d1082bba7c3c8c499f9eedbfa5.sboyd@kernel.org>
Date: Thu, 20 Jul 2023 11:07:07 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Devi Priya <quic_devipriy@...cinc.com>, agross@...nel.org,
andersson@...nel.org, konrad.dybcio@...aro.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, mturquette@...libre.com
Cc: quic_saahtoma@...cinc.com
Subject: Re: [PATCH] clk: qcom: clk-rcg2: Fix wrong RCG clock rate for high parent frequencies
Quoting Devi Priya (2023-07-20 01:33:04)
> If the parent clock rate is greater than unsigned long max/2 then
> integer overflow happens when calculating the clock rate on 32-bit systems.
> As RCG2 uses half integer dividers, the clock rate is first being
> multiplied by 2 which will overflow the unsigned long max value. So, use
> unsigned long long for rate computations to avoid overflow.
>
> Signed-off-by: Devi Priya <quic_devipriy@...cinc.com>
> ---
Any Fixes tag?
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