linux-kernel - Re: [PATCH] x86/cpu: Enable STIBP if Automatic IBRS is enabled

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Message-ID: <6a43b05b-ffdd-0e6f-56a0-5b78532ee383@amd.com>
Date:   Thu, 20 Jul 2023 16:53:23 -0500
From:   Kim Phillips <kim.phillips@....com>
To:     Jim Mattson <jmattson@...gle.com>
CC:     <x86@...nel.org>, Tom Lendacky <thomas.lendacky@....com>,
        Borislav Petkov <bp@...en8.de>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>,
        Joao Martins <joao.m.martins@...cle.com>,
        Jonathan Corbet <corbet@....net>,
        Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
        "Paolo Bonzini" <pbonzini@...hat.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        David Woodhouse <dwmw@...zon.co.uk>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Juergen Gross <jgross@...e.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Tony Luck <tony.luck@...el.com>,
        Alexey Kardashevskiy <aik@....com>, <kvm@...r.kernel.org>,
        <linux-doc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <stable@...r.kernel.org>
Subject: Re: [PATCH] x86/cpu: Enable STIBP if Automatic IBRS is enabled

On 7/20/23 3:58 PM, Jim Mattson wrote:
> On Thu, Jul 20, 2023 at 12:48 PM Kim Phillips <kim.phillips@....com> wrote:
>>
>> Unlike Intel's Enhanced IBRS feature, AMD's Automatic IBRS does not
>> provide protection to processes running at CPL3/user mode [1].
>>
>> Explicitly enable STIBP to protect against cross-thread CPL3
>> branch target injections on systems with Automatic IBRS enabled.
> 
> Is there any performance penalty to enabling STIBP + AUTOIBRS, aside
> from the lost sharing?

Not to my knowledge.

> Or does this just effectively tag the branch
> prediction information with thread ID?

I don't know the implementation, but AFAIK, AUTOIBRS and STIBP
are independent of each other.

Thanks,

Kim