linux-kernel - Re: [PATCH 2/2] ARM: dts: imx6q: Add Variscite MX6 Custom board support

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Date:   Wed, 19 Jul 2023 22:29:27 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     James Hilliard <james.hilliard1@...il.com>
Cc:     devicetree@...r.kernel.org,
        Gregory CLEMENT <gregory.clement@...tlin.com>,
        Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
        soc@...nel.org, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        NXP Linux Team <linux-imx@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] ARM: dts: imx6q: Add Variscite MX6 Custom board support

On Wed, Jul 19, 2023 at 7:43 PM James Hilliard
<james.hilliard1@...il.com> wrote:

> How would I determine what the value of these should be?
>
> The vendor device trees are using 0x80000000 for these values from
> what I can tell.

0x80000000 means "do not touch the pinctrl, use the value from the bootloader".

It's preferable not to rely on the value that comes from the
bootloader and explicitly describe the value in the DT.

For the MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 pin: look at its
IOMUXC_SW_PAD_CTL register in the i.MX6Q Reference Manual.

It is called IOMUXC_SW_PAD_CTL_PAD_DI0_PIN04 and its reset value is 0x1b0b0.

So this entry would become:

MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04             0x1b0b0