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Message-ID: <68e3a7ab-0387-3e58-8c30-3ace807acee5@linux.intel.com>
Date: Thu, 20 Jul 2023 18:38:37 +0800
From: Baolu Lu <baolu.lu@...ux.intel.com>
To: Tomasz Jeznach <tjeznach@...osinc.com>,
Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Paul Walmsley <paul.walmsley@...ive.com>
Cc: baolu.lu@...ux.intel.com, Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <apatel@...tanamicro.com>,
Sunil V L <sunilvl@...tanamicro.com>,
Nick Kossifidis <mick@....forth.gr>,
Sebastien Boeuf <seb@...osinc.com>, iommu@...ts.linux.dev,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux@...osinc.com
Subject: Re: [PATCH 01/11] RISC-V: drivers/iommu: Add RISC-V IOMMU - Ziommu
support.
On 2023/7/20 3:33, Tomasz Jeznach wrote:
> +struct riscv_iommu_domain {
> + struct iommu_domain domain;
> +
> + struct list_head endpoints;
> + struct mutex lock;
> + struct riscv_iommu_device *iommu;
How are domains and iommu devices connected? A domain can be attached to
multiple devices, which are possibly behind different iommu devices. So
a domain is possibly connected to multiple iommu devices.
Is it possible?
> +
> + unsigned mode; /* RIO_ATP_MODE_* enum */
> + unsigned pscid; /* RISC-V IOMMU PSCID */
> +
> + pgd_t *pgd_root; /* page table root pointer */
> +};
> +
> +/* Private dev_iommu_priv object, device-domain relationship. */
> +struct riscv_iommu_endpoint {
> + struct device *dev; /* platform or PCI endpoint device */
> + unsigned devid; /* PCI bus:device:function number */
> + unsigned domid; /* PCI domain number, segment */
> + struct rb_node node; /* device tracking node (lookup by devid) */
> + struct riscv_iommu_device *iommu; /* parent iommu device */
> +
> + struct mutex lock;
> + struct list_head domain; /* endpoint attached managed domain */
> +};
Best regards,
baolu
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