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Message-ID: <5e5be2d4-c563-6beb-b5f5-df47edeebc83@ghiti.fr>
Date: Fri, 21 Jul 2023 17:18:58 +0200
From: Alexandre Ghiti <alex@...ti.fr>
To: guoren@...nel.org, palmer@...osinc.com, paul.walmsley@...ive.com,
falcon@...ylab.org, bjorn@...nel.org, conor.dooley@...rochip.com
Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH] riscv: mm: Fixup spurious fault of kernel vaddr
On 21/07/2023 16:51, guoren@...nel.org wrote:
> From: Guo Ren <guoren@...ux.alibaba.com>
>
> RISC-V specification permits the caching of PTEs whose V (Valid)
> bit is clear. Operating systems must be written to cope with this
> possibility, but implementers are reminded that eagerly caching
> invalid PTEs will reduce performance by causing additional page
> faults.
>
> So we must keep vmalloc_fault for the spurious page faults of kernel
> virtual address from an OoO machine.
>
> Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@...nel.org>
> ---
> arch/riscv/mm/fault.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c
> index 85165fe438d8..f662c9eae7d4 100644
> --- a/arch/riscv/mm/fault.c
> +++ b/arch/riscv/mm/fault.c
> @@ -258,8 +258,7 @@ void handle_page_fault(struct pt_regs *regs)
> * only copy the information from the master page table,
> * nothing more.
> */
> - if ((!IS_ENABLED(CONFIG_MMU) || !IS_ENABLED(CONFIG_64BIT)) &&
> - unlikely(addr >= VMALLOC_START && addr < VMALLOC_END)) {
> + if (unlikely(addr >= TASK_SIZE)) {
> vmalloc_fault(regs, code, addr);
> return;
> }
Can you share what you are trying to fix here?
I have a fix (that's currently running our CI) for commit 7d3332be011e
("riscv: mm: Pre-allocate PGD entries for vmalloc/modules area") that
implements flush_cache_vmap() since we lost the vmalloc_fault.
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