linux-kernel - Re: [PATCH] drm/amd/pm: open brace '{' following struct go on the same line

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CADnq5_NKs6n1v+j6cTeo9OZ04yB12fHXD06XbzjWGzdBaE7RpQ@mail.gmail.com>
Date:   Fri, 21 Jul 2023 11:59:53 -0400
From:   Alex Deucher <alexdeucher@...il.com>
To:     sunran001@...suo.com
Cc:     alexander.deucher@....com, dri-devel@...ts.freedesktop.org,
        amd-gfx@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/amd/pm: open brace '{' following struct go on the
 same line

On Thu, Jul 20, 2023 at 11:53 PM <sunran001@...suo.com> wrote:
>
> ERROR: open brace '{' following struct go on the same line
>

The description doesn't match what the patch is doing.

Alex

> Signed-off-by: Ran Sun <sunran001@...suo.com>
> ---
>   drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
> b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
> index ddc488251313..0cf564ea1ed8 100644
> --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
> +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
> @@ -429,10 +429,10 @@ int amdgpu_pm_load_smu_firmware(struct
> amdgpu_device *adev, uint32_t *smu_versio
>   int amdgpu_dpm_handle_passthrough_sbr(struct amdgpu_device *adev, bool
> enable);
>   int amdgpu_dpm_send_hbm_bad_pages_num(struct amdgpu_device *adev,
> uint32_t size);
>   int amdgpu_dpm_send_hbm_bad_channel_flag(struct amdgpu_device *adev,
> uint32_t size);
> -int amdgpu_dpm_get_dpm_freq_range(struct amdgpu_device *adev,enum
> pp_clock_type type,
> -                                 uint32_t *min,uint32_t *max);
> -int amdgpu_dpm_set_soft_freq_range(struct amdgpu_device *adev,enum
> pp_clock_type type,
> -                                  uint32_t min,uint32_t max);
> +int amdgpu_dpm_get_dpm_freq_range(struct amdgpu_device *adev, enum
> pp_clock_type type,
> +                                 uint32_t *min, uint32_t *max);
> +int amdgpu_dpm_set_soft_freq_range(struct amdgpu_device *adev, enum
> pp_clock_type type,
> +                                  uint32_t min, uint32_t max);
>   int amdgpu_dpm_write_watermarks_table(struct amdgpu_device *adev);
>   int amdgpu_dpm_wait_for_event(struct amdgpu_device *adev, enum
> smu_event_type event,
>                               uint64_t event_arg);