linux-kernel - Re: [PATCH v11 4/4] arm64: support batched/deferred tlb shootdown during page reclamation/migration

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Message-ID: <ZLrNgfDNyZGWx5bG@arm.com>
Date:   Fri, 21 Jul 2023 19:25:05 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Yicong Yang <yangyicong@...wei.com>
Cc:     akpm@...ux-foundation.org, linux-mm@...ck.org,
        linux-arm-kernel@...ts.infradead.org, x86@...nel.org,
        mark.rutland@....com, ryan.roberts@....com, will@...nel.org,
        anshuman.khandual@....com, linux-doc@...r.kernel.org,
        corbet@....net, peterz@...radead.org, arnd@...db.de,
        punit.agrawal@...edance.com, linux-kernel@...r.kernel.org,
        darren@...amperecomputing.com, yangyicong@...ilicon.com,
        huzhanyuan@...o.com, lipeifeng@...o.com, zhangshiming@...o.com,
        guojian@...o.com, realmz6@...il.com, linux-mips@...r.kernel.org,
        openrisc@...ts.librecores.org, linuxppc-dev@...ts.ozlabs.org,
        linux-riscv@...ts.infradead.org, linux-s390@...r.kernel.org,
        Barry Song <21cnbao@...il.com>, wangkefeng.wang@...wei.com,
        xhao@...ux.alibaba.com, prime.zeng@...ilicon.com,
        Jonathan.Cameron@...wei.com, Barry Song <v-songbaohua@...o.com>,
        Nadav Amit <namit@...are.com>, Mel Gorman <mgorman@...e.de>
Subject: Re: [PATCH v11 4/4] arm64: support batched/deferred tlb shootdown
 during page reclamation/migration

On Mon, Jul 17, 2023 at 09:10:04PM +0800, Yicong Yang wrote:
> +static inline void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *batch,
> +					     struct mm_struct *mm,
> +					     unsigned long uaddr)
> +{
> +	__flush_tlb_page_nosync(mm, uaddr);
> +}
> +
> +static inline void arch_flush_tlb_batched_pending(struct mm_struct *mm)
> +{
> +	dsb(ish);
> +}
> +
> +static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
> +{
> +	dsb(ish);
> +}

Nitpick: as an additional patch, I'd add some comment for these two
functions that the TLBI has already been issued and only a DSB is needed
to synchronise its effect on the other CPUs.

Reviewed-by: Catalin Marinas <catalin.marinas@....com>