[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZLrbu6vk6x7l6xwJ@ziepe.ca>
Date: Fri, 21 Jul 2023 16:25:47 -0300
From: Jason Gunthorpe <jgg@...pe.ca>
To: Alistair Popple <apopple@...dia.com>
Cc: akpm@...ux-foundation.org, ajd@...ux.ibm.com,
catalin.marinas@....com, fbarrat@...ux.ibm.com,
iommu@...ts.linux.dev, jhubbard@...dia.com, kevin.tian@...el.com,
kvm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
linuxppc-dev@...ts.ozlabs.org, mpe@...erman.id.au,
nicolinc@...dia.com, npiggin@...il.com, robin.murphy@....com,
seanjc@...gle.com, will@...nel.org, x86@...nel.org,
zhi.wang.linux@...il.com, sj@...nel.org
Subject: Re: [PATCH v3 1/5] arm64/smmu: Use TLBI ASID when invalidating
entire range
On Thu, Jul 20, 2023 at 06:39:23PM +1000, Alistair Popple wrote:
> The ARM SMMU has a specific command for invalidating the TLB for an
> entire ASID. Currently this is used for the IO_PGTABLE API but not for
> ATS when called from the MMU notifier.
>
> The current implementation of notifiers does not attempt to invalidate
> such a large address range, instead walking each VMA and invalidating
> each range individually during mmap removal. However in future SMMU
> TLB invalidations are going to be sent as part of the normal
> flush_tlb_*() kernel calls. To better deal with that add handling to
> use TLBI ASID when invalidating the entire address space.
>
> Signed-off-by: Alistair Popple <apopple@...dia.com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
Reviewed-by: Jason Gunthorpe <jgg@...dia.com>
Jason
Powered by blists - more mailing lists