linux-kernel - Re: [PATCH RESEND v2 1/7] mfd: mt6358: Add missing registers for LDO voltage calibration

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Message-ID: <651da0fc-2654-afb5-d364-31d97715e66f@collabora.com>
Date:   Fri, 21 Jul 2023 10:53:49 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Chen-Yu Tsai <wenst@...omium.org>, Lee Jones <lee@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Mark Brown <broonie@...nel.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        Matthias Brugger <matthias.bgg@...il.com>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v2 1/7] mfd: mt6358: Add missing registers for LDO
 voltage calibration

Il 21/07/23 10:28, Chen-Yu Tsai ha scritto:
> Most of the LDOs, except the "VSRAM_*" ones, on the MT6358 and MT6366
> PMICs support a finer output voltage calibration within the range of
> +0 mV to +100 mV with 10 mV step. Some of the registers for this
> function are missing from the register table.
> 

Please mention that you're doing this addition *because* you're using
those new definitions right after, and in the regulator driver:

[...]
In preparation for adding support for improved output voltage selection
in mt6358-regulator, add the relevant missing registers for the same.
[...]

After which,

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>

> Add the missing ones for MT6358.
> 
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
> ---
>   include/linux/mfd/mt6358/registers.h | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/include/linux/mfd/mt6358/registers.h b/include/linux/mfd/mt6358/registers.h
> index 3d33517f178c..5ea2590be710 100644
> --- a/include/linux/mfd/mt6358/registers.h
> +++ b/include/linux/mfd/mt6358/registers.h
> @@ -262,6 +262,12 @@
>   #define MT6358_LDO_VBIF28_CON3                0x1db0
>   #define MT6358_VCAMA1_ANA_CON0                0x1e08
>   #define MT6358_VCAMA2_ANA_CON0                0x1e0c
> +#define MT6358_VFE28_ANA_CON0                 0x1e10
> +#define MT6358_VCN28_ANA_CON0                 0x1e14
> +#define MT6358_VBIF28_ANA_CON0                0x1e18
> +#define MT6358_VAUD28_ANA_CON0                0x1e1c
> +#define MT6358_VAUX18_ANA_CON0                0x1e20
> +#define MT6358_VXO22_ANA_CON0                 0x1e24
>   #define MT6358_VCN33_ANA_CON0                 0x1e28
>   #define MT6358_VSIM1_ANA_CON0                 0x1e2c
>   #define MT6358_VSIM2_ANA_CON0                 0x1e30