linux-kernel - Re: (subset) [PATCH v2 00/15] UFS: Add OPP and interconnect support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 21 Jul 2023 22:17:17 -0700
From:   Bjorn Andersson <andersson@...nel.org>
To:     vireshk@...nel.org, nm@...com, sboyd@...nel.org,
        myungjoo.ham@...sung.com, kyungmin.park@...sung.com,
        cw00.choi@...sung.com, konrad.dybcio@...aro.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        conor+dt@...nel.org, jejb@...ux.ibm.com,
        martin.petersen@...cle.com, Manivannan Sadhasivam <mani@...nel.org>
Cc:     alim.akhtar@...sung.com, avri.altman@....com, bvanassche@....org,
        linux-scsi@...r.kernel.org, linux-pm@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        quic_asutoshd@...cinc.com, quic_cang@...cinc.com,
        quic_nitirawa@...cinc.com, quic_narepall@...cinc.com,
        quic_bhaskarv@...cinc.com, quic_richardp@...cinc.com,
        quic_nguyenb@...cinc.com, quic_ziqichen@...cinc.com,
        bmasney@...hat.com, krzysztof.kozlowski@...aro.org,
        linux-kernel@...r.kernel.org
Subject: Re: (subset) [PATCH v2 00/15] UFS: Add OPP and interconnect support


On Thu, 20 Jul 2023 11:10:45 +0530, Manivannan Sadhasivam wrote:
> This series adds OPP (Operating Points) support to UFSHCD driver and
> interconnect support to Qcom UFS driver.
> 
> Motivation behind adding OPP support is to scale both clocks as well as
> regulators/performance state dynamically. Currently, UFSHCD just scales
> clock frequency during runtime with the help of "freq-table-hz" property
> defined in devicetree. With the addition of OPP tables in devicetree (as
> done for Qcom SDM845 and SM8250 SoCs in this series) UFSHCD can now scale
> both clocks and performance state of power domain which helps in power
> saving.
> 
> [...]

Applied, thanks!

[03/15] arm64: dts: qcom: sdm845: Add missing RPMh power domain to GCC
        commit: 4b6ea15c0a1122422b44bf6c47a3c22fc8d46777
[04/15] arm64: dts: qcom: sdm845: Fix the min frequency of "ice_core_clk"
        commit: bbbef6e24bc4493602df68b052f6f48d48e3184a
[12/15] arm64: dts: qcom: sdm845: Add interconnect paths to UFSHC
        commit: 84e2e371f4f911337604e8ba9281e950230d1189
[13/15] arm64: dts: qcom: sm8250: Add interconnect paths to UFSHC
        commit: aeea56072cc8cb0af2b35798aa7d72047f4c8ffa

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>