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Message-Id: <20230722084004.21857-7-tudor.ambarus@linaro.org>
Date: Sat, 22 Jul 2023 11:40:01 +0300
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: tkuw584924@...il.com, takahiro.kuwano@...ineon.com,
michael@...le.cc
Cc: pratyush@...nel.org, linux-mtd@...ts.infradead.org,
linux-kernel@...r.kernel.org, bacem.daassi@...ineon.com,
miquel.raynal@...tlin.com, richard@....at,
Takahiro Kuwano <Takahiro.Kuwano@...ineon.com>
Subject: [PATCH v3 06/11] mtd: spi-nor: spansion: add MCP support in set_octal_dtr()
From: Takahiro Kuwano <Takahiro.Kuwano@...ineon.com>
Infineon multi-chip package (MCP) devices require the Octal DTR
configuraion to be set on each die. We can access to configuration
registers in each die by using params->n_dice and params->vreg_offset[]
populated from SFDP. Add MCP support in set_octal_dtr().
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@...ineon.com>
---
drivers/mtd/spi-nor/spansion.c | 33 +++++++++++++++++++--------------
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index 5b6f36b56e9f..28d0a995f3b9 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -206,17 +206,19 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor)
const struct spi_nor_flash_parameter *params = nor->params;
u8 *buf = nor->bouncebuf;
u64 addr;
- int ret;
+ int i, ret;
- addr = params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR2;
- ret = cypress_nor_set_memlat(nor, addr);
- if (ret)
- return ret;
+ for (i = 0; i < params->n_dice; i++) {
+ addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR2;
+ ret = cypress_nor_set_memlat(nor, addr);
+ if (ret)
+ return ret;
- addr = params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5;
- ret = cypress_nor_set_octal_dtr_bits(nor, addr);
- if (ret)
- return ret;
+ addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR5;
+ ret = cypress_nor_set_octal_dtr_bits(nor, addr);
+ if (ret)
+ return ret;
+ }
/* Read flash ID to make sure the switch was successful. */
ret = spi_nor_read_id(nor, nor->addr_nbytes, 3, buf,
@@ -251,14 +253,17 @@ static int cypress_nor_set_single_spi_bits(struct spi_nor *nor, u64 addr)
static int cypress_nor_octal_dtr_dis(struct spi_nor *nor)
{
+ const struct spi_nor_flash_parameter *params = nor->params;
u8 *buf = nor->bouncebuf;
u64 addr;
- int ret;
+ int i, ret;
- addr = nor->params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5;
- ret = cypress_nor_set_single_spi_bits(nor, addr);
- if (ret)
- return ret;
+ for (i = 0; i < params->n_dice; i++) {
+ addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR5;
+ ret = cypress_nor_set_single_spi_bits(nor, addr);
+ if (ret)
+ return ret;
+ }
/* Read flash ID to make sure the switch was successful. */
ret = spi_nor_read_id(nor, 0, 0, buf, SNOR_PROTO_1_1_1);
--
2.34.1
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