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Message-ID: <ZLvyn0xq3Msk+lxF@probook>
Date:   Sat, 22 Jul 2023 17:15:43 +0200
From:   Jonathan Neuschäfer <j.neuschaefer@....net>
To:     Stephen Boyd <sboyd@...nel.org>
Cc:     Jonathan Neuschäfer <j.neuschaefer@....net>,
        linux-clk@...r.kernel.org, openbmc@...ts.ozlabs.org,
        linux-kernel@...r.kernel.org, linux-watchdog@...r.kernel.org,
        devicetree@...r.kernel.org,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Avi Fishman <avifishman70@...il.com>,
        Tomer Maimon <tmaimon77@...il.com>,
        Tali Perry <tali.perry1@...il.com>,
        Patrick Venture <venture@...gle.com>,
        Nancy Yuen <yuenn@...gle.com>,
        Benjamin Fair <benjaminfair@...gle.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Guenter Roeck <linux@...ck-us.net>,
        Christophe JAILLET <christophe.jaillet@...adoo.fr>,
        Joel Stanley <joel@....id.au>
Subject: Re: [PATCH v8 2/2] clk: wpcm450: Add Nuvoton WPCM450 clock/reset
 controller driver

On Thu, Jul 20, 2023 at 05:02:15PM -0700, Stephen Boyd wrote:
> Quoting Jonathan Neuschäfer (2023-04-28 12:02:26)
> > diff --git a/drivers/clk/clk-wpcm450.c b/drivers/clk/clk-wpcm450.c
[...]
> > +static unsigned long wpcm450_clk_pll_recalc_rate(struct clk_hw *hw,
> > +                                                unsigned long parent_rate)
> > +{
> > +       struct wpcm450_clk_pll *pll = to_wpcm450_clk_pll(hw);
> > +       unsigned long fbdv, indv, otdv;
> > +       u64 rate;
> > +       u32 pllcon;
> > +
> > +       if (parent_rate == 0) {
> > +               pr_err("%s: parent rate is zero", __func__);
> 
> This can happen more often than you think, so probably best to remove
> it.

Alright.

> > +static const struct wpcm450_pll_data pll_data[] = {
> > +       { "pll0", { .name = "ref" }, REG_PLLCON0, 0 },
> 
> This is new code, please don't use .name. Instead use .fw_name or .index with preference to
> .index first and .hw if the pointer is available in this driver.

As far as I can see, .fw_name and .index depend on a struct device*
being passed to clk_hw_register, which won't be available unless I
actually convert the driver to a platform driver.

Not relying on .name would indeed be nice.

> > +       // PLLs
> 
> Please use /* comments like this */

Ok.

> 
> > +       for (i = 0; i < ARRAY_SIZE(pll_data); i++) {
> > +               const struct wpcm450_pll_data *data = &pll_data[i];
> > +
> > +               hw = wpcm450_clk_register_pll(clk_base + data->reg, data->name,
> > +                                             &data->parent, data->flags);
> > +               if (IS_ERR(hw)) {
> > +                       pr_info("Failed to register PLL: %pe", hw);
> 
> Missing newline?

Indeed.

> > +CLK_OF_DECLARE(wpcm450_clk_init, "nuvoton,wpcm450-clk", wpcm450_clk_init);
> 
> Is something preventing this from being a platform driver?

As far as I remember I have tried to convert it to a platform driver but
wasn't very successful/satisfied. Unfortunately I didn't take detailed notes.

I'll give it another try.


Best regards,
Jonathan

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