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Message-ID: <2d790f7e-b373-f0ee-d978-fb78bc4f1ed1@quicinc.com>
Date: Sun, 23 Jul 2023 19:18:29 +0530
From: Kathiravan T <quic_kathirav@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>
CC: Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>,
Elliot Berman <quic_eberman@...cinc.com>,
Mukesh Ojha <quic_mojha@...cinc.com>,
Kalle Valo <kvalo@...nel.org>,
Loic Poulain <loic.poulain@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-gpio@...r.kernel.org>, <quic_srichara@...cinc.com>,
<quic_sjaganat@...cinc.com>, <quic_anusha@...cinc.com>,
<quic_saahtoma@...cinc.com>
Subject: Re: [PATCH V5 2/3] pinctrl: qcom: Use qcom_scm_io_update_field()
On 7/22/2023 8:39 AM, Bjorn Andersson wrote:
> On Thu, Jul 20, 2023 at 12:34:07PM +0530, Kathiravan T wrote:
>> From: Mukesh Ojha <quic_mojha@...cinc.com>
>>
>> Use qcom_scm_io_update_field() function introduced in the commit
>> 1f899e6997bb ("firmware: qcom_scm: provide a read-modify-write function").
>>
>> Acked-by: Linus Walleij <linus.walleij@...aro.org>
>> Signed-off-by: Mukesh Ojha <quic_mojha@...cinc.com>
>> Signed-off-by: Kathiravan T <quic_kathirav@...cinc.com>
>> ---
>> Changes in V5:
>> - Dropped the ununecessary paranthesis
>> - Updated the commit message to indicate the commit ID in which
>> qcom_scm_io_update_field is introduced instead of simply
>> mentioning the "last commit"
>>
>> drivers/pinctrl/qcom/pinctrl-msm.c | 12 +++++-------
>> 1 file changed, 5 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
>> index 2585ef2b2793..5ecde5bea38b 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
>> @@ -1040,6 +1040,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>> const struct msm_pingroup *g;
>> unsigned long flags;
>> bool was_enabled;
>> + u32 mask;
>> u32 val;
>>
>> if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) {
>> @@ -1074,23 +1075,20 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>> * With intr_target_use_scm interrupts are routed to
>> * application cpu using scm calls.
>> */
>> + mask = GENMASK(2, 0) << g->intr_target_bit;
>> if (pctrl->intr_target_use_scm) {
>> u32 addr = pctrl->phys_base[0] + g->intr_target_reg;
>> int ret;
>>
>> - qcom_scm_io_readl(addr, &val);
>> -
>> - val &= ~(7 << g->intr_target_bit);
>> - val |= g->intr_target_kpss_val << g->intr_target_bit;
>> -
>> - ret = qcom_scm_io_writel(addr, val);
>> + val = g->intr_target_kpss_val << g->intr_target_bit;
>> + ret = qcom_scm_io_update_field(addr, mask, val);
> Be aware when you resubmit that this code has changed. So please base
> your changes on linux-next.
I applied and tested this change on top of linux-next before sending it.
I hope you are referring to the Ninad's patch[1] which is not available
on linux-next yet. I shall wait for couple of days before sending the
another version or let me resend based on Ninad's patch. Please let me
know if you are referring something else.
[1]
https://lore.kernel.org/linux-arm-msm/20230718064246.12429-1-quic_ninanaik@quicinc.com/
> Regards,
> Bjorn
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