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Message-Id: <20230723162245.35033-4-mmyangfl@gmail.com>
Date: Mon, 24 Jul 2023 00:22:28 +0800
From: David Yang <mmyangfl@...il.com>
To: linux-clk@...r.kernel.org
Cc: David Yang <mmyangfl@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>, linux-kernel@...r.kernel.org
Subject: [PATCH v5 03/13] clk: hisilicon: hi3798cv200: Use helper functions
Use common helper functions and register clks with a single of_device_id
data.
Signed-off-by: David Yang <mmyangfl@...il.com>
---
drivers/clk/hisilicon/crg-hi3798cv200.c | 196 +++---------------------
1 file changed, 20 insertions(+), 176 deletions(-)
diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c b/drivers/clk/hisilicon/crg-hi3798cv200.c
index a0b16be1e25d..c2079bf293b2 100644
--- a/drivers/clk/hisilicon/crg-hi3798cv200.c
+++ b/drivers/clk/hisilicon/crg-hi3798cv200.c
@@ -12,7 +12,6 @@
#include <linux/platform_device.h>
#include "clk.h"
#include "crg.h"
-#include "reset.h"
/* hi3798CV200 core CRG */
#define HI3798CV200_INNER_CLK_OFFSET 64
@@ -41,6 +40,7 @@
#define HI3798CV200_CRG_NR_CLKS 128
+#define HI3798CV200_SYSCTRL_NR_CLKS 16
static const struct hisi_fixed_rate_clock hi3798cv200_fixed_rate_clks[] = {
{ HISTB_OSC_CLK, "clk_osc", NULL, 0, 24000000, },
{ HISTB_APB_CLK, "clk_apb", NULL, 0, 100000000, },
@@ -193,90 +193,18 @@ static const struct hisi_gate_clock hi3798cv200_gate_clks[] = {
CLK_SET_RATE_PARENT, 0xb0, 18, 0 },
};
-static struct hisi_clock_data *hi3798cv200_clk_register(
- struct platform_device *pdev)
-{
- struct hisi_clock_data *clk_data;
- int ret;
-
- clk_data = hisi_clk_alloc(pdev, HI3798CV200_CRG_NR_CLKS);
- if (!clk_data)
- return ERR_PTR(-ENOMEM);
-
- /* hisi_phase_clock is resource managed */
- ret = hisi_clk_register_phase(&pdev->dev,
- hi3798cv200_phase_clks,
- ARRAY_SIZE(hi3798cv200_phase_clks),
- clk_data);
- if (ret)
- return ERR_PTR(ret);
-
- ret = hisi_clk_register_fixed_rate(hi3798cv200_fixed_rate_clks,
- ARRAY_SIZE(hi3798cv200_fixed_rate_clks),
- clk_data);
- if (ret)
- return ERR_PTR(ret);
-
- ret = hisi_clk_register_mux(hi3798cv200_mux_clks,
- ARRAY_SIZE(hi3798cv200_mux_clks),
- clk_data);
- if (ret)
- goto unregister_fixed_rate;
-
- ret = hisi_clk_register_gate(hi3798cv200_gate_clks,
- ARRAY_SIZE(hi3798cv200_gate_clks),
- clk_data);
- if (ret)
- goto unregister_mux;
-
- ret = of_clk_add_provider(pdev->dev.of_node,
- of_clk_src_onecell_get, &clk_data->clk_data);
- if (ret)
- goto unregister_gate;
-
- return clk_data;
-
-unregister_gate:
- hisi_clk_unregister_gate(hi3798cv200_gate_clks,
- ARRAY_SIZE(hi3798cv200_gate_clks),
- clk_data);
-unregister_mux:
- hisi_clk_unregister_mux(hi3798cv200_mux_clks,
- ARRAY_SIZE(hi3798cv200_mux_clks),
- clk_data);
-unregister_fixed_rate:
- hisi_clk_unregister_fixed_rate(hi3798cv200_fixed_rate_clks,
- ARRAY_SIZE(hi3798cv200_fixed_rate_clks),
- clk_data);
- return ERR_PTR(ret);
-}
-
-static void hi3798cv200_clk_unregister(struct platform_device *pdev)
-{
- struct hisi_crg_dev *crg = platform_get_drvdata(pdev);
-
- of_clk_del_provider(pdev->dev.of_node);
-
- hisi_clk_unregister_gate(hi3798cv200_gate_clks,
- ARRAY_SIZE(hi3798cv200_gate_clks),
- crg->clk_data);
- hisi_clk_unregister_mux(hi3798cv200_mux_clks,
- ARRAY_SIZE(hi3798cv200_mux_clks),
- crg->clk_data);
- hisi_clk_unregister_fixed_rate(hi3798cv200_fixed_rate_clks,
- ARRAY_SIZE(hi3798cv200_fixed_rate_clks),
- crg->clk_data);
-}
-
-static const struct hisi_crg_funcs hi3798cv200_crg_funcs = {
- .register_clks = hi3798cv200_clk_register,
- .unregister_clks = hi3798cv200_clk_unregister,
+static const struct hisi_clocks hi3798cv200_crg_clks = {
+ .nr = HI3798CV200_CRG_NR_CLKS,
+ .fixed_rate_clks = hi3798cv200_fixed_rate_clks,
+ .fixed_rate_clks_num = ARRAY_SIZE(hi3798cv200_fixed_rate_clks),
+ .mux_clks = hi3798cv200_mux_clks,
+ .mux_clks_num = ARRAY_SIZE(hi3798cv200_mux_clks),
+ .phase_clks = hi3798cv200_phase_clks,
+ .phase_clks_num = ARRAY_SIZE(hi3798cv200_phase_clks),
+ .gate_clks = hi3798cv200_gate_clks,
+ .gate_clks_num = ARRAY_SIZE(hi3798cv200_gate_clks),
};
-/* hi3798CV200 sysctrl CRG */
-
-#define HI3798CV200_SYSCTRL_NR_CLKS 16
-
static const struct hisi_gate_clock hi3798cv200_sysctrl_gate_clks[] = {
{ HISTB_IR_CLK, "clk_ir", "24m",
CLK_SET_RATE_PARENT, 0x48, 4, 0, },
@@ -286,115 +214,31 @@ static const struct hisi_gate_clock hi3798cv200_sysctrl_gate_clks[] = {
CLK_SET_RATE_PARENT, 0x48, 10, 0, },
};
-static struct hisi_clock_data *hi3798cv200_sysctrl_clk_register(
- struct platform_device *pdev)
-{
- struct hisi_clock_data *clk_data;
- int ret;
-
- clk_data = hisi_clk_alloc(pdev, HI3798CV200_SYSCTRL_NR_CLKS);
- if (!clk_data)
- return ERR_PTR(-ENOMEM);
-
- ret = hisi_clk_register_gate(hi3798cv200_sysctrl_gate_clks,
- ARRAY_SIZE(hi3798cv200_sysctrl_gate_clks),
- clk_data);
- if (ret)
- return ERR_PTR(ret);
-
- ret = of_clk_add_provider(pdev->dev.of_node,
- of_clk_src_onecell_get, &clk_data->clk_data);
- if (ret)
- goto unregister_gate;
-
- return clk_data;
-
-unregister_gate:
- hisi_clk_unregister_gate(hi3798cv200_sysctrl_gate_clks,
- ARRAY_SIZE(hi3798cv200_sysctrl_gate_clks),
- clk_data);
- return ERR_PTR(ret);
-}
-
-static void hi3798cv200_sysctrl_clk_unregister(struct platform_device *pdev)
-{
- struct hisi_crg_dev *crg = platform_get_drvdata(pdev);
-
- of_clk_del_provider(pdev->dev.of_node);
-
- hisi_clk_unregister_gate(hi3798cv200_sysctrl_gate_clks,
- ARRAY_SIZE(hi3798cv200_sysctrl_gate_clks),
- crg->clk_data);
-}
-
-static const struct hisi_crg_funcs hi3798cv200_sysctrl_funcs = {
- .register_clks = hi3798cv200_sysctrl_clk_register,
- .unregister_clks = hi3798cv200_sysctrl_clk_unregister,
+static const struct hisi_clocks hi3798cv200_sysctrl_clks = {
+ .nr = HI3798CV200_SYSCTRL_NR_CLKS,
+ .gate_clks = hi3798cv200_sysctrl_gate_clks,
+ .gate_clks_num = ARRAY_SIZE(hi3798cv200_sysctrl_gate_clks),
};
static const struct of_device_id hi3798cv200_crg_match_table[] = {
{ .compatible = "hisilicon,hi3798cv200-crg",
- .data = &hi3798cv200_crg_funcs },
+ .data = &hi3798cv200_crg_clks },
{ .compatible = "hisilicon,hi3798cv200-sysctrl",
- .data = &hi3798cv200_sysctrl_funcs },
+ .data = &hi3798cv200_sysctrl_clks },
{ }
};
MODULE_DEVICE_TABLE(of, hi3798cv200_crg_match_table);
-static int hi3798cv200_crg_probe(struct platform_device *pdev)
-{
- struct hisi_crg_dev *crg;
-
- crg = devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL);
- if (!crg)
- return -ENOMEM;
-
- crg->funcs = of_device_get_match_data(&pdev->dev);
- if (!crg->funcs)
- return -ENOENT;
-
- crg->rstc = hisi_reset_init(pdev);
- if (!crg->rstc)
- return -ENOMEM;
-
- crg->clk_data = crg->funcs->register_clks(pdev);
- if (IS_ERR(crg->clk_data)) {
- hisi_reset_exit(crg->rstc);
- return PTR_ERR(crg->clk_data);
- }
-
- platform_set_drvdata(pdev, crg);
- return 0;
-}
-
-static void hi3798cv200_crg_remove(struct platform_device *pdev)
-{
- struct hisi_crg_dev *crg = platform_get_drvdata(pdev);
-
- hisi_reset_exit(crg->rstc);
- crg->funcs->unregister_clks(pdev);
-}
-
static struct platform_driver hi3798cv200_crg_driver = {
- .probe = hi3798cv200_crg_probe,
- .remove_new = hi3798cv200_crg_remove,
+ .probe = hisi_crg_probe,
+ .remove_new = hisi_crg_remove,
.driver = {
.name = "hi3798cv200-crg",
.of_match_table = hi3798cv200_crg_match_table,
},
};
-static int __init hi3798cv200_crg_init(void)
-{
- return platform_driver_register(&hi3798cv200_crg_driver);
-}
-core_initcall(hi3798cv200_crg_init);
-
-static void __exit hi3798cv200_crg_exit(void)
-{
- platform_driver_unregister(&hi3798cv200_crg_driver);
-}
-module_exit(hi3798cv200_crg_exit);
+module_platform_driver(hi3798cv200_crg_driver);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("HiSilicon Hi3798CV200 CRG Driver");
--
2.40.1
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