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Message-ID: <cover.1690148927.git.daniel@makrotopia.org>
Date: Sun, 23 Jul 2023 22:57:08 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Felix Fietkau <nbd@....name>, John Crispin <john@...ozen.org>,
Sean Wang <sean.wang@...iatek.com>,
Mark Lee <Mark-MC.Lee@...iatek.com>,
Lorenzo Bianconi <lorenzo@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Russell King <linux@...linux.org.uk>,
Bjørn Mork <bjorn@...k.no>,
Greg Ungerer <gerg@...nel.org>,
Florian Fainelli <f.fainelli@...il.com>,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: [PATCH net-next v5 0/9] net: ethernet: mtk_eth_soc: add basic
support for MT7988 SoC
The MediaTek MT7988 SoC introduces a new version (3) of the NETSYS
block and comes with three instead of two MACs.
The first MAC can be internally connected to a built-in Gigabit
Ethernet switch with four 1000M/100M/10M twisted pair user ports.
The second MAC can be internally connected to a built-in 2500Base-T
Ethernet PHY.
There are two SerDes units which can be operated in USXGMII, 10GBase-(K)R,
5GBase-R, 2500Base-X, 1000Base-X or SGMII interface mode.
This series adds initial support for NETSYS v3 and the first MAC of the
MT7988 SoC connecting the built-in DSA switch.
The switch is supported since commit 110c18bfed414 ("net: dsa: mt7530:
introduce driver for MT7988 built-in switch").
Basic support for the 1000M/100M/10M built-in PHYs connected to the
switch ports is present since commit ("98c485eaf509b net: phy: add
driver for MediaTek SoC built-in GE PHYs").
The series should not conflict with Russell's recently submitted series
"Remove legacy phylink behaviour", hence the order of them being
picked into net-next doesn't matter.
Changes since v4:
* Rebase on current net-next tree
Changes since v3:
* Set 'mediatek,infracfg = false;' in dt-bindings for those chips
which do not require infracfg phandle.
Changes since v2:
* Use version number instead of feature bits for NETSYS version
* Remove unneeded check for NULL when calling mtk_pcs_lynxi_destroy
* Reduce dt-bindings to what is actually needed at this point for
the driver to work.
Changes since v1:
* Set MTK_MAX_DEVS to 3 instead of converting to dynamic number of
Ethernet MACs.
* use mtk_m32 when ever possible
* more small improvements and minor comments addressed
Daniel Golle (3):
dt-bindings: net: mediatek,net: add missing mediatek,mt7621-eth
dt-bindings: net: mediatek,net: add mt7988-eth binding
net: ethernet: mtk_eth_soc: convert clock bitmap to u64
Lorenzo Bianconi (6):
net: ethernet: mtk_eth_soc: add version in mtk_soc_data
net: ethernet: mtk_eth_soc: increase MAX_DEVS to 3
net: ethernet: mtk_eth_soc: rely on MTK_MAX_DEVS and remove
MTK_MAC_COUNT
net: ethernet: mtk_eth_soc: add NETSYS_V3 version support
net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data struct to u64
net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC
.../devicetree/bindings/net/mediatek,net.yaml | 109 ++++-
drivers/net/ethernet/mediatek/mtk_eth_path.c | 36 +-
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 398 ++++++++++++++----
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 327 +++++++++-----
drivers/net/ethernet/mediatek/mtk_ppe.c | 18 +-
.../net/ethernet/mediatek/mtk_ppe_offload.c | 2 +-
drivers/net/ethernet/mediatek/mtk_wed.c | 4 +-
7 files changed, 668 insertions(+), 226 deletions(-)
--
2.41.0
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