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Message-ID: <898f8e84-de31-8147-ebb3-cef41f22868f@linaro.org>
Date: Mon, 24 Jul 2023 18:29:14 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: qaz6750 <qaz6750@...look.com>, andersson@...nel.org,
agross@...nel.org
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm8150: Fix the I2C7 interrupt
On 24.07.2023 18:21, qaz6750 wrote:
> I2C6 and I2C7 use the same interrupts, which is incorrect.
> In the downstream kernel, I2C7 has interrupts of 608 instead of 607.
>
> Signed-off-by: qaz6750 <qaz6750@...look.com>
> ---
Fixes: 81bee6953b58 ("arm64: dts: qcom: sm8150: add i2c nodes")
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 18c822abd..214f6e028 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1231,7 +1231,7 @@ i2c7: i2c@...000 {
> dma-names = "tx", "rx";
> pinctrl-names = "default";
> pinctrl-0 = <&qup_i2c7_default>;
> - interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> status = "disabled";
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