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Message-ID: <c3e4912d-3635-864a-9944-6cc280641cf5@quicinc.com>
Date: Mon, 24 Jul 2023 12:05:54 -0700
From: Elliot Berman <quic_eberman@...cinc.com>
To: Kathiravan T <quic_kathirav@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>,
"Mukesh Ojha" <quic_mojha@...cinc.com>,
Kalle Valo <kvalo@...nel.org>,
Loic Poulain <loic.poulain@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-gpio@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_sjaganat@...cinc.com>,
<quic_anusha@...cinc.com>, <quic_saahtoma@...cinc.com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: Re: [PATCH V5 1/3] firmware: qcom_scm: provide a read-modify-write
function
On 7/20/2023 12:04 AM, Kathiravan T wrote:
> From: Mukesh Ojha <quic_mojha@...cinc.com>
>
> It was realized by Srinivas K. that there is a need of read-modify-write
> scm exported function so that it can be used by multiple clients.
>
> Let's introduce qcom_scm_io_update_field() which masks out the bits and
> write the passed value to that bit-offset.
>
> Suggested-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> Signed-off-by: Mukesh Ojha <quic_mojha@...cinc.com>
> Signed-off-by: Kathiravan T <quic_kathirav@...cinc.com>
After updating EXPORT_SYMBOL -> EXPORT_SYMBOL_GPL:
Reviewed-by: Elliot Berman <quic_eberman@...cinc.com>
> ---
> Changes in V5:
> - No changes
>
> drivers/firmware/qcom_scm.c | 15 +++++++++++++++
> include/linux/firmware/qcom/qcom_scm.h | 2 ++
> 2 files changed, 17 insertions(+)
>
> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
> index fde33acd46b7..104d86e49b97 100644
> --- a/drivers/firmware/qcom_scm.c
> +++ b/drivers/firmware/qcom_scm.c
> @@ -407,6 +407,21 @@ int qcom_scm_set_remote_state(u32 state, u32 id)
> }
> EXPORT_SYMBOL(qcom_scm_set_remote_state);
>
> +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val)
> +{
> + unsigned int old, new;
> + int ret;
> +
> + ret = qcom_scm_io_readl(addr, &old);
> + if (ret)
> + return ret;
> +
> + new = (old & ~mask) | (val & mask);
> +
> + return qcom_scm_io_writel(addr, new);
> +}
> +EXPORT_SYMBOL(qcom_scm_io_update_field);
> +
> static int __qcom_scm_set_dload_mode(struct device *dev, bool enable)
> {
> struct qcom_scm_desc desc = {
> diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
> index 250ea4efb7cb..ca41e4eb33ad 100644
> --- a/include/linux/firmware/qcom/qcom_scm.h
> +++ b/include/linux/firmware/qcom/qcom_scm.h
> @@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral);
>
> extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
> extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
> +extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask,
> + unsigned int val);
>
> extern bool qcom_scm_restore_sec_cfg_available(void);
> extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
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