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Message-ID: <20230724101054.25268-1-william.qiu@starfivetech.com>
Date: Mon, 24 Jul 2023 18:10:52 +0800
From: William Qiu <william.qiu@...rfivetech.com>
To: <devicetree@...r.kernel.org>, <linux-spi@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
CC: Mark Brown <broonie@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Emil Renner Berthing <kernel@...il.dk>,
Linus Walleij <linus.walleij@...aro.org>,
William Qiu <william.qiu@...rfivetech.com>
Subject: [PATCH v3 0/2] Add SPI module for StarFive JH7110 SoC
Hi,
This patchset adds initial rudimentary support for the StarFive
SPI controller. And this driver will be used in StarFive's
VisionFive 2 board. The first patch constrain minItems of clocks
for JH7110 SPI and Patch 2 adds support for StarFive JH7110 SPI.
Changes v2->v3:
- Rebaed to v6.5rc3.
- Registered one more clock.
- Dropped commit that changed the number of clocks in YAML.
- Rewrited the commit comment.
Changes v1->v2:
- Rebaed to v6.5rc1.
- Submitted reference file separately.
- Dropped 'status' node as it was 'okay' by default.
- Dropped Co-developed-by message.
The patch series is based on v6.5rc3.
William Qiu (2):
dt-bindings: spi: add reference file to YAML
riscv: dts: starfive: Add spi node and pins configuration
.../devicetree/bindings/spi/spi-pl022.yaml | 1 +
.../jh7110-starfive-visionfive-2.dtsi | 50 +++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 105 ++++++++++++++++++
3 files changed, 156 insertions(+)
--
2.34.1
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