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Message-ID: <20230725150206.184-1-ravi.bangoria@amd.com>
Date: Tue, 25 Jul 2023 20:32:03 +0530
From: Ravi Bangoria <ravi.bangoria@....com>
To: <peterz@...radead.org>, <namhyung@...nel.org>, <acme@...nel.org>
CC: <ravi.bangoria@....com>, <mingo@...nel.org>, <eranian@...gle.com>,
<kan.liang@...ux.intel.com>, <jolsa@...nel.org>,
<irogers@...gle.com>, <adrian.hunter@...el.com>,
<leo.yan@...aro.org>, <kjain@...ux.ibm.com>,
<linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<sandipan.das@....com>, <ananth.narayan@....com>,
<santosh.shukla@....com>
Subject: [RESEND][PATCH v4 0/3] perf/mem: AMD IBS improvements
Kernel IBS driver wasn't using new PERF_MEM_* APIs due to some of its
limitations. Mainly:
1. mem_lvl_num doesn't allow setting multiple sources whereas old API
allows it. Setting multiple data sources is useful because IBS on
pre-zen4 uarch doesn't provide fine granular DataSrc details (there
is only one such DataSrc(2h) though).
2. perf mem sorting logic (sort__lvl_cmp()) ignores mem_lvl_num. perf
c2c (c2c_decode_stats()) does not use mem_lvl_num at all.
Set mem_lvl_num, mem_remote and mem_hops for data_src via IBS. Handle
first issue using mem_lvl_num = ANY_CACHE | HOPS_0. In addition to
setting new API fields, convert all individual field assignments to
compile time wrapper macros built using PERF_MEM_S(). Also convert
DataSrc conditional code to array lookups.
v3: https://lore.kernel.org/r/20230407112459.548-1-ravi.bangoria@amd.com
v3->v4:
- Tool patches were already picked up by Arnaldo. Resending only
kernel patches with few tweaks in commit messages. No functionality
changes.
Namhyung Kim (1):
perf/x86/ibs: Set mem_lvl_num, mem_remote and mem_hops for data_src
Ravi Bangoria (2):
perf/mem: Introduce PERF_MEM_LVLNUM_UNC
perf/mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_NA
arch/x86/events/amd/ibs.c | 156 ++++++++++++++------------------
include/linux/perf_event.h | 3 +-
include/uapi/linux/perf_event.h | 3 +-
3 files changed, 72 insertions(+), 90 deletions(-)
--
2.41.0
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