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Message-ID: <20230725164104.273965-9-gatien.chevallier@foss.st.com>
Date: Tue, 25 Jul 2023 18:41:01 +0200
From: Gatien Chevallier <gatien.chevallier@...s.st.com>
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CC: <linux-crypto@...r.kernel.org>, <devicetree@...r.kernel.org>,
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Gatien Chevallier <gatien.chevallier@...s.st.com>
Subject: [PATCH v2 08/11] arm64: dts: st: add RIFSC as a domain controller for STM32MP25x boards
RIFSC is a firewall controller. Change its compatible so that is matches
the documentation and reference RIFSC as a feature-domain-controller.
Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
---
Changes in V2:
- Fix rifsc node name
- Move the "ranges" property under the
"feature-domains" one
arch/arm64/boot/dts/st/stm32mp251.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 5268a4321841..cb084381e4cd 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -105,11 +105,13 @@ soc@0 {
interrupt-parent = <&intc>;
ranges = <0x0 0x0 0x0 0x80000000>;
- rifsc: rifsc-bus@...80000 {
- compatible = "simple-bus";
+ rifsc: bus@...80000 {
+ compatible = "st,stm32mp25-rifsc";
reg = <0x42080000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
+ feature-domain-controller;
+ #feature-domain-cells = <1>;
ranges;
usart2: serial@...e0000 {
@@ -117,6 +119,7 @@ usart2: serial@...e0000 {
reg = <0x400e0000 0x400>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ck_flexgen_08>;
+ feature-domains = <&rifsc 32>;
status = "disabled";
};
};
--
2.35.3
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