lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <169039710582.703186.14988638861645421057.b4-ty@arm.com>
Date:   Wed, 26 Jul 2023 19:45:10 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Will Deacon <will@...nel.org>, Mark Brown <broonie@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64/fpsimd: Don't flush SME register hardware state along with thread

On Mon, 24 Jul 2023 14:09:19 +0100, Mark Brown wrote:
> We recently changed the fpsimd thread flush to flush the physical SME
> state as well as the thread state for the current thread.  Unfortunately
> this leads to intermittent corruption in interaction with the lazy
> FPSIMD register switching.  When under heavy load such as can be
> triggered by the startup phase of fp-stress it is possible that the
> current thread may not be scheduled prior to returning to userspace, and
> indeed we may end up returning to the last thread that was scheduled on
> the PE without ever exiting the kernel to any other task.  If that
> happens then we will not reload the register state from memory, leading
> to loss of any SME register state.
> 
> [...]

Applied to arm64 (for-next/fixes), thanks!

[1/1] arm64/fpsimd: Don't flush SME register hardware state along with thread
      https://git.kernel.org/arm64/c/3421ddbe6d64

-- 
Catalin

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ