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Message-ID: <16f29fd8-ae31-bb93-3ccf-e722faf033ba@gmail.com>
Date: Wed, 26 Jul 2023 18:36:31 +0900
From: Takahiro Kuwano <tkuw584924@...il.com>
To: Tudor Ambarus <tudor.ambarus@...aro.org>,
takahiro.kuwano@...ineon.com, michael@...le.cc
Cc: pratyush@...nel.org, linux-mtd@...ts.infradead.org,
linux-kernel@...r.kernel.org, bacem.daassi@...ineon.com,
miquel.raynal@...tlin.com, richard@....at
Subject: Re: [PATCH v4 10/11] mtd: spi-nor: spansion: switch s25hx_t to use
vreg_offset for quad_enable()
On 7/26/2023 4:52 PM, Tudor Ambarus wrote:
> All s25hx_t flashes have single or multi chip flavors and already use
> n_dice and vreg_offset in cypress_nor_sr_ready_and_clear. Switch s25hx_t
> to always use vreg_offset for the quad_enable() method, so that we use
> the same code base for both single and multi chip package flashes.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
> ---
> drivers/mtd/spi-nor/spansion.c | 18 +++++++-----------
> 1 file changed, 7 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> index 30a3ffbfa381..6abef5b515a1 100644
> --- a/drivers/mtd/spi-nor/spansion.c
> +++ b/drivers/mtd/spi-nor/spansion.c
> @@ -24,8 +24,6 @@
> #define SPINOR_REG_CYPRESS_STR1V \
> (SPINOR_REG_CYPRESS_VREG + SPINOR_REG_CYPRESS_STR1)
> #define SPINOR_REG_CYPRESS_CFR1 0x2
> -#define SPINOR_REG_CYPRESS_CFR1V \
> - (SPINOR_REG_CYPRESS_VREG + SPINOR_REG_CYPRESS_CFR1)
> #define SPINOR_REG_CYPRESS_CFR1_QUAD_EN BIT(1) /* Quad Enable */
> #define SPINOR_REG_CYPRESS_CFR2 0x3
> #define SPINOR_REG_CYPRESS_CFR2V \
> @@ -348,10 +346,6 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor)
> u8 i;
> int ret;
>
> - if (!params->n_dice)
> - return cypress_nor_quad_enable_volatile_reg(nor,
> - SPINOR_REG_CYPRESS_CFR1V);
> -
> for (i = 0; i < params->n_dice; i++) {
> addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR1;
> ret = cypress_nor_quad_enable_volatile_reg(nor, addr);
> @@ -657,15 +651,17 @@ static int s25hx_t_late_init(struct spi_nor *nor)
> {
> struct spi_nor_flash_parameter *params = nor->params;
>
> + if (!params->n_dice || !params->vreg_offset) {
> + dev_err(nor->dev, "%s failed. The volatile register offset could not be retrieved from SFDP.\n",
> + __func__);
> + return -EOPNOTSUPP;
> + }
> +
> /* Fast Read 4B requires mode cycles */
> params->reads[SNOR_CMD_READ_FAST].num_mode_clocks = 8;
> -
> + params->ready = cypress_nor_sr_ready_and_clear;
> cypress_nor_ecc_init(nor);
>
> - /* Replace ready() with multi die version */
> - if (params->n_dice)
> - params->ready = cypress_nor_sr_ready_and_clear;
> -
> return 0;
> }
>
Tested-by: Takahiro Kuwano <Takahiro.Kuwano@...ineon.com>
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