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Message-ID: <20230727163630.gcsczhebozgf2tsu@box.shutemov.name>
Date: Thu, 27 Jul 2023 19:36:30 +0300
From: kirill.shutemov@...ux.intel.com
To: Kai Huang <kai.huang@...el.com>
Cc: peterz@...radead.org, linux-kernel@...r.kernel.org,
dave.hansen@...el.com, tglx@...utronix.de, bp@...en8.de,
mingo@...hat.com, hpa@...or.com, x86@...nel.org, seanjc@...gle.com,
pbonzini@...hat.com, isaku.yamahata@...el.com,
sathyanarayanan.kuppuswamy@...ux.intel.com,
n.borisov.lkml@...il.com
Subject: Re: [PATCH v3 05/12] x86/tdx: Pass TDCALL/SEAMCALL input/output
registers via a structure
On Wed, Jul 26, 2023 at 11:25:07PM +1200, Kai Huang wrote:
> diff --git a/arch/x86/virt/vmx/tdx/tdxcall.S b/arch/x86/virt/vmx/tdx/tdxcall.S
> index 6bdf6e137953..a0e7fe81bf63 100644
> --- a/arch/x86/virt/vmx/tdx/tdxcall.S
> +++ b/arch/x86/virt/vmx/tdx/tdxcall.S
> @@ -17,34 +17,33 @@
> * TDX module and hypercalls to the VMM.
> * SEAMCALL - used by TDX hosts to make requests to the
> * TDX module.
> + *
> + *-------------------------------------------------------------------------
> + * TDCALL/SEAMCALL ABI:
> + *-------------------------------------------------------------------------
> + * Input Registers:
> + *
> + * RAX - TDCALL/SEAMCALL Leaf number.
> + * RCX,RDX,R8-R9 - TDCALL/SEAMCALL Leaf specific input registers.
> + *
> + * Output Registers:
> + *
> + * RAX - TDCALL/SEAMCALL instruction error code.
> + * RCX,RDX,R8-R11 - TDCALL/SEAMCALL Leaf specific output registers.
> + *
> + *-------------------------------------------------------------------------
So, you keep the existing asymetry in IN and OUT registers. R10 and R11
are OUT-only registers. It can be confusing for user since it is the same
structure now. I guess it changes in the following patches, but I would
prefer to make them even here if there's no good reason not to.
--
Kiryl Shutsemau / Kirill A. Shutemov
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