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Message-ID: <yw1x8rb1xkwg.fsf@mansr.com>
Date: Thu, 27 Jul 2023 19:35:27 +0100
From: Måns Rullgård <mans@...sr.com>
To: Andre Przywara <andre.przywara@....com>
Cc: Alessandro Zummo <a.zummo@...ertech.it>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
linux-rtc@...r.kernel.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [RFC][PATCH] rtc: sunxi: use external 32k oscillator if provided
Andre Przywara <andre.przywara@....com> writes:
> Hi Mans,
>
> On 27/07/2023 16:01, Mans Rullgard wrote:
>> Set the OSC32K_SRC_SEL bit in the LOSC control register if a clock is
>> specified in the devicetree.
>> Signed-off-by: Mans Rullgard <mans@...sr.com>
>> ---
>> The newer sun6i rtc driver is a proper clk provider with parent
>> selection. Doing the same thing in this driver would be difficult
>> while staying compatible with existing devicetrees. For that reason,
>> this simpler approach seems reasonable.
>> ---
>> drivers/rtc/rtc-sunxi.c | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
>> diff --git a/drivers/rtc/rtc-sunxi.c b/drivers/rtc/rtc-sunxi.c
>> index 5d019e3a835a..4f1053eab778 100644
>> --- a/drivers/rtc/rtc-sunxi.c
>> +++ b/drivers/rtc/rtc-sunxi.c
>> @@ -5,6 +5,7 @@
>> * Copyright (c) 2013, Carlo Caione <carlo.caione@...il.com>
>> */
>> +#include <linux/clk.h>
>> #include <linux/delay.h>
>> #include <linux/err.h>
>> #include <linux/fs.h>
>> @@ -21,8 +22,10 @@
>> #include <linux/types.h>
>> #define SUNXI_LOSC_CTRL 0x0000
>> +#define SUNXI_LOSC_CTRL_KEY (0x16aa << 16)
>> #define SUNXI_LOSC_CTRL_RTC_HMS_ACC BIT(8)
>> #define SUNXI_LOSC_CTRL_RTC_YMD_ACC BIT(7)
>> +#define SUNXI_LOSC_CTRL_OSC32K_SRC_SEL BIT(0)
>> #define SUNXI_RTC_YMD 0x0004
>> @@ -422,6 +425,7 @@ MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
>> static int sunxi_rtc_probe(struct platform_device *pdev)
>> {
>> struct sunxi_rtc_dev *chip;
>> + struct clk *extclk;
>> int ret;
>> chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
>> @@ -455,6 +459,14 @@ static int sunxi_rtc_probe(struct platform_device *pdev)
>> return -ENODEV;
>> }
>> + /* use external oscillator if present */
>> + extclk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
>> + if (IS_ERR(extclk))
>> + return PTR_ERR(extclk);
>> + if (extclk)
>> + writel(SUNXI_LOSC_CTRL_KEY | SUNXI_LOSC_CTRL_OSC32K_SRC_SEL,
>> + chip->base + SUNXI_LOSC_CTRL);
>
> This should be a read-modify-write operation, since we don't want to disturb
> other bits in this register.
Good point. I guess it's best to leave everything untouched if the
clock isn't specified, just in case someone has a bootloader that sets
this bit.
> In general this looks OK to me, but would need to be documented in the
> bindings docs, to allow an optional clocks property.
Sure, I'll make a patch for that as well.
--
Måns Rullgård
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