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Message-Id: <20230727101139.23048-1-zhangqing@rock-chips.com>
Date:   Thu, 27 Jul 2023 18:11:37 +0800
From:   Elaine Zhang <zhangqing@...k-chips.com>
To:     mturquette@...libre.com, sboyd@...nel.org,
        kever.yang@...k-chips.com, zhangqing@...k-chips.com,
        heiko@...ech.de
Cc:     linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        huangtao@...k-chips.com
Subject: [PATCH v1 0/2] clk: rockchip: add GATE_LINK

Recent Rockchip SoCs have a new hardware block called Native Interface
Unit (NIU), which gates clocks to devices behind them. These effectively
need two parent clocks.
Use GATE_LINK to handle this.

Elaine Zhang (2):
  clk: rockchip: add support for gate link
  clk: rockchip: rk3588: Adjust the GATE_LINK parameter

 drivers/clk/rockchip/Makefile                 |   1 +
 drivers/clk/rockchip/clk-gate-link.c          | 191 ++++++++++++++++++
 drivers/clk/rockchip/clk-rk3588.c             | 109 +++++-----
 drivers/clk/rockchip/clk.c                    |   7 +
 drivers/clk/rockchip/clk.h                    |  22 ++
 .../dt-bindings/clock/rockchip,rk3588-cru.h   |   3 +-
 6 files changed, 281 insertions(+), 52 deletions(-)
 create mode 100644 drivers/clk/rockchip/clk-gate-link.c

-- 
2.17.1

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