[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZMPz8MIevHBd6zsI@nvidia.com>
Date: Fri, 28 Jul 2023 13:59:28 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Yi Liu <yi.l.liu@...el.com>
Cc: joro@...tes.org, alex.williamson@...hat.com, kevin.tian@...el.com,
robin.murphy@....com, baolu.lu@...ux.intel.com, cohuck@...hat.com,
eric.auger@...hat.com, nicolinc@...dia.com, kvm@...r.kernel.org,
mjrosato@...ux.ibm.com, chao.p.peng@...ux.intel.com,
yi.y.sun@...ux.intel.com, peterx@...hat.com, jasowang@...hat.com,
shameerali.kolothum.thodi@...wei.com, lulu@...hat.com,
suravee.suthikulpanit@....com, iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org, linux-kselftest@...r.kernel.org,
zhenzhong.duan@...el.com
Subject: Re: [PATCH v3 02/17] iommu: Add nested domain support
On Mon, Jul 24, 2023 at 04:03:51AM -0700, Yi Liu wrote:
> @@ -350,6 +354,10 @@ struct iommu_ops {
> * @iotlb_sync_map: Sync mappings created recently using @map to the hardware
> * @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
> * queue
> + * @cache_invalidate_user: Flush hardware TLBs caching user space IO mappings
> + * @cache_invalidate_user_data_len: Defined length of input user data for the
> + * cache_invalidate_user op, being sizeof the
> + * structure in include/uapi/linux/iommufd.h
> * @iova_to_phys: translate iova to physical address
> * @enforce_cache_coherency: Prevent any kind of DMA from bypassing IOMMU_CACHE,
> * including no-snoop TLPs on PCIe or other platform
> @@ -379,6 +387,9 @@ struct iommu_domain_ops {
> size_t size);
> void (*iotlb_sync)(struct iommu_domain *domain,
> struct iommu_iotlb_gather *iotlb_gather);
> + int (*cache_invalidate_user)(struct iommu_domain *domain,
> + void *user_data);
If we are doing const unions, then this void * should also be a const
union.
Jason
Powered by blists - more mailing lists