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Message-ID: <20230728102943.267342-1-varshini.rajendran@microchip.com>
Date: Fri, 28 Jul 2023 15:59:43 +0530
From: Varshini Rajendran <varshini.rajendran@...rochip.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <nicolas.ferre@...rochip.com>,
<alexandre.belloni@...tlin.com>, <claudiu.beznea@...rochip.com>,
<linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
CC: <varshini.rajendran@...rochip.com>
Subject: [PATCH v3 40/50] clk: at91: sam9x7: Allow PLLs to be exported and referenced in DT
Allow PLLADIV2 and LVDSPLL to be referenced as a PMC_TYPE_CORE
clock from phandle in DT.
Signed-off-by: Varshini Rajendran <varshini.rajendran@...rochip.com>
---
include/dt-bindings/clock/at91.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
index 3e3972a814c1..6ede88c3992d 100644
--- a/include/dt-bindings/clock/at91.h
+++ b/include/dt-bindings/clock/at91.h
@@ -38,6 +38,10 @@
#define PMC_CPU (PMC_MAIN + 9)
#define PMC_MCK1 (PMC_MAIN + 10)
+/* SAM9X7 */
+#define PMC_PLLADIV2 (PMC_MAIN + 11)
+#define PMC_LVDSPLL (PMC_MAIN + 12)
+
#ifndef AT91_PMC_MOSCS
#define AT91_PMC_MOSCS 0 /* MOSCS Flag */
#define AT91_PMC_LOCKA 1 /* PLLA Lock */
--
2.25.1
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