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Message-ID: <CACRpkdYA2MLdX5xY-rTcKyKH2eFXZyHHXcX9G-vdWT5GmChwaA@mail.gmail.com>
Date: Sat, 29 Jul 2023 22:59:20 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Nikita Shubin <nikita.shubin@...uefel.me>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Hartley Sweeten <hsweeten@...ionengravers.com>,
Lennert Buytenhek <kernel@...tstofly.org>,
Alexander Sverdlin <alexander.sverdlin@...il.com>,
Michael Peters <mpeters@...eddedts.com>,
Kris Bahnsen <kris@...eddedts.com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 35/42] ARM: dts: ep93xx: add ts7250 board
On Mon, Jul 24, 2023 at 3:45 PM Nikita Shubin <nikita.shubin@...uefel.me> wrote:
> > > + nand-controller@...00000 {
> >
> > Where is this address? It does not work like that. If this is part of
> > SoC, then should be in DTSI and part of soc node. If not, then it is
> > some other bus which needs some description. Top-level is not a bus.
> >
>
> It's some kind of EBI, but it doesn't need a driver it is transparent
> on ts7250, the logic is controlled through installed CPLD.
>
> The EBI it self is a part of the SoC through:
>
> https://elixir.bootlin.com/linux/v6.5-rc3/source/arch/arm/mach-ep93xx/soc.h#L35
>
> EP93XX_CS0_PHYS_BASE_ASYNC to EP93XX_CS0_PHYS_BASE_SYNC.
>
> So for ts7250 this includes:
>
> - NAND
> - m48t86
> - watchdog
>
> I don't even know how to represent it correctly, would "simple-bus"
> with "ranges" defined suit here, so it will represent hierarchy but
> won't do anything ?
Check how I solved this on the IXP4xx EBI for an example:
Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml
Top level bus inside soc:
arch/arm/boot/dts/intel/ixp/intel-ixp4xx.dtsi
Example platform:
arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts
Notice chip select number in first cell.
I think you want to do something similar here?
Yours,
Linus Walleij
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