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Message-ID: <51a7f260-59f9-2cd4-9d49-484df00fb3b2@kernel.org>
Date: Mon, 31 Jul 2023 07:23:54 +0200
From: Jiri Slaby <jirislaby@...nel.org>
To: Sherry Sun <sherry.sun@....com>, gregkh@...uxfoundation.org,
tomonori.sakita@...d.co.jp, atsushi.nemoto@...d.co.jp
Cc: linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-imx@....com
Subject: Re: [PATCH] tty: serial: fsl_lpuart: Clear the error flags by writing
1 for lpuart32 platforms
On 31. 07. 23, 3:50, Sherry Sun wrote:
> Do not read the data register to clear the error flags for lpuart32
> platforms, the additional read may cause the receive FIFO underflow
> since the DMA has already read the data register.
> Now all lpuart32 platforms support write 1 to clear those error bits,
What does this "Now" mean? Will this change break some older platforms?
> let's use this method to better clear the error flags.
>
> Fixes: 42b68768e51b ("serial: fsl_lpuart: DMA support for 32-bit variant")
> Signed-off-by: Sherry Sun <sherry.sun@....com>
> ---
> drivers/tty/serial/fsl_lpuart.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
> index f6644c5989d3..f72e1340b47d 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -1120,8 +1120,8 @@ static void lpuart_copy_rx_to_tty(struct lpuart_port *sport)
> unsigned long sr = lpuart32_read(&sport->port, UARTSTAT);
>
> if (sr & (UARTSTAT_PE | UARTSTAT_FE)) {
> - /* Read DR to clear the error flags */
> - lpuart32_read(&sport->port, UARTDATA);
> + /* Clear the error flags */
> + lpuart32_write(&sport->port, sr, UARTSTAT);
>
> if (sr & UARTSTAT_PE)
> sport->port.icount.parity++;
thanks,
--
js
suse labs
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