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Message-ID: <0a548fac-9ba3-fdfe-f33a-3adf029af1b9@infradead.org>
Date:   Mon, 31 Jul 2023 15:06:29 -0700
From:   Randy Dunlap <rdunlap@...radead.org>
To:     Lizhi Hou <lizhi.hou@....com>, vkoul@...nel.org,
        dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     Nishad Saraf <nishads@....com>, nishad.saraf@....com,
        sonal.santan@....com, max.zhen@....com
Subject: Re: [PATCH V3 1/1] dmaengine: amd: qdma: Add AMD QDMA driver



On 7/31/23 10:12, Lizhi Hou wrote:
> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> index 644c188d6a11..3646fe1ab347 100644
> --- a/drivers/dma/Kconfig
> +++ b/drivers/dma/Kconfig
> @@ -85,6 +85,19 @@ config AMCC_PPC440SPE_ADMA
>  	help
>  	  Enable support for the AMCC PPC440SPe RAID engines.
>  
> +config AMD_QDMA
> +	tristate "AMD Queue-based DMA"
> +	depends on HAS_IOMEM
> +	select DMA_ENGINE
> +	select DMA_VIRTUAL_CHANNELS
> +	select REGMAP_MMIO
> +	help
> +	  Enable support for the AMD Queue-based DMA subsystem. The primary
> +	  mechanism to transfer data using the QDMA is for the QDMA engine to
> +	  operate on instructions (descriptors) provided by the host operating
> +	  system. Using the descriptors, the QDMA can move data in both the Host

	                                                           either

> +	  to Card (H2C) direction, or the Card to Host (C2H) direction.

	                         ^ drop the comma.

-- 
~Randy

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