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Message-ID: <e3d692d9-82a3-22d0-7fa0-4e89876ef8f4@linaro.org>
Date: Mon, 31 Jul 2023 09:08:07 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Duje Mihanović <duje.mihanovic@...le.hr>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
~postmarketos/upstreaming@...ts.sr.ht
Cc: phone-devel@...r.kernel.org, afaerber@...e.com
Subject: Re: [PATCH v2 4/9] dt-bindings: clock: Add Marvell PXA1908 clock
bindings
On 30/07/2023 23:18, Duje Mihanović wrote:
> On Friday, July 28, 2023 9:18:44 AM CEST Krzysztof Kozlowski wrote:
>>> +/* axi (apmu) peripherals */
>>> +#define PXA1908_CLK_CCIC1 9
>>> +#define PXA1908_CLK_ISP 14
>>
>> Why do you have gaps between IDs? The clock IDs are supposed to be
>> continuous, otherwise it is not an ID.
>
> Similarly to the PXA1928 clock driver, each clock's ID is its register offset
> divided by 4. Should I use continuous IDs and put the register offsets in the
> clock driver instead?
Either that or drop the bindings file, because otherwise what is the
point of having it in the bindings?
Best regards,
Krzysztof
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