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Message-ID: <ZMeW5jcsYgisxsoJ@arm.com>
Date: Mon, 31 Jul 2023 12:11:34 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: Kefeng Wang <wangkefeng.wang@...wei.com>
Cc: Andrew Morton <akpm@...ux-foundation.org>,
Will Deacon <will@...nel.org>,
Mike Kravetz <mike.kravetz@...cle.com>,
Muchun Song <muchun.song@...ux.dev>,
Mina Almasry <almasrymina@...gle.com>, kirill@...temov.name,
joel@...lfernandes.org, william.kucharski@...cle.com,
kaleshsingh@...gle.com, linux-mm@...ck.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] arm64: tlb: set huge page size to stride for hugepage
On Mon, Jul 31, 2023 at 03:48:29PM +0800, Kefeng Wang wrote:
> +/*
> + * We cannot use leaf-only invalidation here, since we may be invalidating
> + * table entries as part of collapsing hugepages or moving page tables.
> + * Set the tlb_level to 0 because we can not get enough information here.
> + */
> +#define flush_tlb_range(vma, start, end) \
> + __flush_tlb_range(vma, start, end, \
> + ((vma)->vm_flags & VM_HUGETLB) \
> + ? huge_page_size(hstate_vma(vma)) \
> + : PAGE_SIZE, false, 0)
This won't work if we use the contiguous PTE to get 64K hugetlb pages on
a 4K base page configuration. The 16 base pages in the range would have
to be invalidated individually (the contig PTE bit is just a hint, the
hardware may or may not take it into account).
--
Catalin
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