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Message-ID: <20230801171902.42zjwdarh7jma5pl@mercury.elektranox.org>
Date:   Tue, 1 Aug 2023 19:19:02 +0200
From:   Sebastian Reichel <sebastian.reichel@...labora.com>
To:     Elaine Zhang <zhangqing@...k-chips.com>
Cc:     mturquette@...libre.com, sboyd@...nel.org,
        kever.yang@...k-chips.com, heiko@...ech.de,
        linux-clk@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        linux-kernel@...r.kernel.org, huangtao@...k-chips.com
Subject: Re: [PATCH v2 2/3] dt-bindings: clock: rk3588: export PCLK_VO1GRF
 clk id

Hi,

On Tue, Aug 01, 2023 at 03:43:56PM +0800, Elaine Zhang wrote:
> add PCLK_VO1GRF clk id.
> 
> Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
> ---

Fixes: f204a60e545c ("dt-bindings: clock: add rk3588 clock definitions")
Reviewed-by: Sebastian Reichel <sebastian.reichel@...labora.com>

-- Sebastian

>  include/dt-bindings/clock/rockchip,rk3588-cru.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h
> index b5616bca7b44..864a321ab362 100644
> --- a/include/dt-bindings/clock/rockchip,rk3588-cru.h
> +++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h
> @@ -733,8 +733,9 @@
>  #define ACLK_AV1_PRE			718
>  #define PCLK_AV1_PRE			719
>  #define HCLK_SDIO_PRE			720
> +#define PCLK_VO1GRF			721
>  
> -#define CLK_NR_CLKS			(HCLK_SDIO_PRE + 1)
> +#define CLK_NR_CLKS			(PCLK_VO1GRF + 1)
>  
>  /* scmi-clocks indices */
>  
> -- 
> 2.17.1
> 

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