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Message-ID: <20230801-whenever-imitation-b2759b212f6b@spud>
Date: Tue, 1 Aug 2023 08:23:23 +0100
From: Conor Dooley <conor@...nel.org>
To: Yinbo Zhu <zhuyinbo@...ngson.cn>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Jianmin Lv <lvjianmin@...ngson.cn>, wanghongliang@...ngson.cn,
Liu Peibao <liupeibao@...ngson.cn>,
loongson-kernel@...ts.loongnix.cn
Subject: Re: [PATCH v2 1/2] gpio: dt-bindings: add parsing of loongson gpio
offset
On Tue, Aug 01, 2023 at 02:39:49PM +0800, Yinbo Zhu wrote:
>
>
> 在 2023/7/31 下午11:55, Conor Dooley 写道:
> > On Mon, Jul 31, 2023 at 05:10:58PM +0800, Yinbo Zhu wrote:
> > > Add parsing GPIO configure, input, output, interrupt register offset
> > > address and GPIO control mode support.
> >
> > This reeks of insufficient use of SoC specific compatibles. Do GPIO
> > controllers on the same SoC have different register offsets?
>
>
> Yes,
>
> > Where are the users for this?
>
>
> For example, ls2k500 contains multiple GPIO chips with different
> (configure, input, output, interrupt) offset addresses, but all others
> are the same.
Right. That's admittedly not what I expected to hear! Can you firstly
explain this in the commit message, and secondly add a soc-specific
compatible for the ls2k500 and only allow these properties on that SoC?
Thanks,
Conor.
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