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Message-ID: <20230801103817.025388065@linutronix.de>
Date: Tue, 1 Aug 2023 12:47:23 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: LKML <linux-kernel@...r.kernel.org>
Cc: x86@...nel.org, Andrew Cooper <andrew.cooper3@...rix.com>,
Tom Lendacky <thomas.lendacky@....com>,
Paolo Bonzini <pbonzini@...hat.com>,
Wei Liu <wei.liu@...nel.org>,
Arjan van de Ven <arjan@...ux.intel.com>,
Juergen Gross <jgross@...e.com>,
Michael Kelley <mikelley@...rosoft.com>,
Peter Keresztes Schmidt <peter@...esztesschmidt.de>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>
Subject: [patch V3 34/60] x86/apic: Consolidate wait_icr_idle()
implementations
Two copies and also needlessly public. Move it into ipi.c so it can be
inlined. Rename it to apic_mem_wait_icr_idle().
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>
---
arch/x86/include/asm/apic.h | 1 -
arch/x86/kernel/apic/apic.c | 6 ------
arch/x86/kernel/apic/apic_flat_64.c | 4 ++--
arch/x86/kernel/apic/bigsmp_32.c | 2 +-
arch/x86/kernel/apic/ipi.c | 6 +++---
arch/x86/kernel/apic/local.h | 2 ++
arch/x86/kernel/apic/probe_32.c | 2 +-
7 files changed, 9 insertions(+), 14 deletions(-)
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -98,7 +98,6 @@ static inline u32 native_apic_mem_read(u
return *((volatile u32 *)(APIC_BASE + reg));
}
-extern void native_apic_wait_icr_idle(void);
extern u32 native_safe_apic_wait_icr_idle(void);
extern void native_apic_icr_write(u32 low, u32 id);
extern u64 native_apic_icr_read(void);
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -240,12 +240,6 @@ static void __init apic_disable(void)
apic = &apic_noop;
}
-void native_apic_wait_icr_idle(void)
-{
- while (apic_read(APIC_ICR) & APIC_ICR_BUSY)
- cpu_relax();
-}
-
u32 native_safe_apic_wait_icr_idle(void)
{
u32 send_status;
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -111,7 +111,7 @@ static struct apic apic_flat __ro_after_
.eoi_write = native_apic_mem_write,
.icr_read = native_apic_icr_read,
.icr_write = native_apic_icr_write,
- .wait_icr_idle = native_apic_wait_icr_idle,
+ .wait_icr_idle = apic_mem_wait_icr_idle,
.safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
};
@@ -187,7 +187,7 @@ static struct apic apic_physflat __ro_af
.eoi_write = native_apic_mem_write,
.icr_read = native_apic_icr_read,
.icr_write = native_apic_icr_write,
- .wait_icr_idle = native_apic_wait_icr_idle,
+ .wait_icr_idle = apic_mem_wait_icr_idle,
.safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
};
--- a/arch/x86/kernel/apic/bigsmp_32.c
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -108,7 +108,7 @@ static struct apic apic_bigsmp __ro_afte
.eoi_write = native_apic_mem_write,
.icr_read = native_apic_icr_read,
.icr_write = native_apic_icr_write,
- .wait_icr_idle = native_apic_wait_icr_idle,
+ .wait_icr_idle = apic_mem_wait_icr_idle,
.safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
};
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -102,7 +102,7 @@ static inline int __prepare_ICR2(unsigne
return SET_XAPIC_DEST_FIELD(mask);
}
-static inline void __xapic_wait_icr_idle(void)
+void apic_mem_wait_icr_idle(void)
{
while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
cpu_relax();
@@ -137,7 +137,7 @@ static void __default_send_IPI_shortcut(
if (unlikely(vector == NMI_VECTOR))
safe_apic_wait_icr_idle();
else
- __xapic_wait_icr_idle();
+ apic_mem_wait_icr_idle();
/* Destination field (ICR2) and the destination mode are ignored */
native_apic_mem_write(APIC_ICR, __prepare_ICR(shortcut, vector, 0));
@@ -154,7 +154,7 @@ void __default_send_IPI_dest_field(unsig
if (unlikely(vector == NMI_VECTOR))
safe_apic_wait_icr_idle();
else
- __xapic_wait_icr_idle();
+ apic_mem_wait_icr_idle();
/* Set the IPI destination field in the ICR */
native_apic_mem_write(APIC_ICR2, __prepare_ICR2(dest_mask));
--- a/arch/x86/kernel/apic/local.h
+++ b/arch/x86/kernel/apic/local.h
@@ -44,6 +44,8 @@ static inline unsigned int __prepare_ICR
void default_init_apic_ldr(void);
+void apic_mem_wait_icr_idle(void);
+
/*
* This is used to send an IPI with no shorthand notation (the destination is
* specified in bits 56 to 63 of the ICR).
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -64,7 +64,7 @@ static struct apic apic_default __ro_aft
.eoi_write = native_apic_mem_write,
.icr_read = native_apic_icr_read,
.icr_write = native_apic_icr_write,
- .wait_icr_idle = native_apic_wait_icr_idle,
+ .wait_icr_idle = apic_mem_wait_icr_idle,
.safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
};
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