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Message-ID: <20230801002127.534020-2-mizhang@google.com>
Date: Tue, 1 Aug 2023 00:21:21 +0000
From: Mingwei Zhang <mizhang@...gle.com>
To: Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>
Cc: kvm@...r.kernel.org, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, Mingwei Zhang <mizhang@...gle.com>,
Kai Huang <kai.huang@...el.com>,
Jim Mattson <jmattson@...gle.com>,
David Matlack <dmatlack@...gle.com>,
Ben Gardon <bgardon@...gle.com>, Xu Yilun <yilun.xu@...el.com>,
Zhi Wang <zhi.wang.linux@...il.com>,
Randy Dunlap <rdunlap@...radead.org>
Subject: [PATCH v3 1/6] KVM: Documentation: Add the missing description for
guest_mode in kvm_mmu_page_role
Add the missing description for guest_mode in kvm_mmu_page_role
description. guest_mode tells KVM whether a shadow page is used for the L1
or an L2. Update the missing field in documentation.
Signed-off-by: Mingwei Zhang <mizhang@...gle.com>
Reviewed-by: Kai Huang <kai.huang@...el.com>
---
Documentation/virt/kvm/x86/mmu.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/virt/kvm/x86/mmu.rst b/Documentation/virt/kvm/x86/mmu.rst
index 8364afa228ec..561efa8ec7d7 100644
--- a/Documentation/virt/kvm/x86/mmu.rst
+++ b/Documentation/virt/kvm/x86/mmu.rst
@@ -202,6 +202,8 @@ Shadow pages contain the following information:
Is 1 if the MMU instance cannot use A/D bits. EPT did not have A/D
bits before Haswell; shadow EPT page tables also cannot use A/D bits
if the L1 hypervisor does not enable them.
+ role.guest_mode:
+ Indicates the shadow page is created for a nested guest.
role.passthrough:
The page is not backed by a guest page table, but its first entry
points to one. This is set if NPT uses 5-level page tables (host
--
2.41.0.585.gd2178a4bd4-goog
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