linux-kernel - Re: [PATCH] LoongArch: Fixup cmpxchg sematic for memory barrier

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Message-ID: <CAHirt9iiA_zdBbmnmMNAEmvKBU-1imRxD7wG-0OmnPTsG2RJMA@mail.gmail.com>
Date:   Wed, 2 Aug 2023 10:23:18 +0800
From:   WANG Rui <wangrui@...ngson.cn>
To:     Guo Ren <guoren@...nel.org>
Cc:     chenhuacai@...nel.or, kernel@...0n.name, arnd@...db.de,
        andi.shyti@...ux.intel.com, andrzej.hajda@...el.com,
        peterz@...radead.org, will@...nel.org, boqun.feng@...il.com,
        mark.rutland@....com, loongarch@...ts.linux.dev,
        linux-kernel@...r.kernel.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH] LoongArch: Fixup cmpxchg sematic for memory barrier

On Wed, Aug 2, 2023 at 7:17 AM Guo Ren <guoren@...nel.org> wrote:
>
> On Tue, Aug 1, 2023 at 12:37 PM WANG Rui <wangrui@...ngson.cn> wrote:
> >
> > On Tue, Aug 1, 2023 at 6:50 PM Guo Ren <guoren@...nel.org> wrote:
> > >
> > > On Tue, Aug 1, 2023 at 5:32 PM WANG Rui <wangrui@...ngson.cn> wrote:
> > > > No. LL and LL won't reorder because LL implies a memory barrier(though
> > > > not acquire semantics).
> > > That means we could remove __WEAK_LLSC_MB totally, right?
> >
> > More precisely, __WEAK_LLSC_MB is intended to prevent reordering
> > between LL and normal LD used to fetch the expected value for cmpxchg.
> Oh, that's unnecessary when cmpxchg fails.
>
> Maybe you treat cmpxchg as a CoRR antidote in coincidence. Please
> solve the CoRR problem by READ_ONCE.
>
> See alpha architecture.

Unfortunately, the LL instruction has no acquire semantics. Even if
our kernel team improves READ_ONCE, it cannot prevent reordering
between LL and READ_ONCE after cmpxchg fails.

LL (<memory-barrier> + <load-exclusive>); WEAK_LLSC_MB; READ_ONCE
(<normal-load>); ...

vs

LL (<memory-barrier> + <load-exclusive>); READ_ONCE (<normal-load> +
<memory-barrier>); ...

Improving READ_ONCE is really important.

Regards,
-- 
WANG Rui