[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <00553fc1-a033-5d4b-e8db-18f265f08492@starfivetech.com>
Date: Fri, 4 Aug 2023 17:20:09 +0800
From: Xingyu Wu <xingyu.wu@...rfivetech.com>
To: Maxim Kochetkov <fido_max@...ox.ru>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
"Takashi Iwai" <tiwai@...e.com>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor.dooley@...rochip.com>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC: Jose Abreu <joabreu@...opsys.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Walker Chen <walker.chen@...rfivetech.com>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<alsa-devel@...a-project.org>, <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v1 3/5] ASoC: dwc: i2s: Add StarFive JH7110 SoC support
On 2023/8/3 13:16, Maxim Kochetkov wrote:
>
>
> On 02.08.2023 11:42, Xingyu Wu wrote:
>
>> diff --git a/sound/soc/dwc/dwc-i2s.c b/sound/soc/dwc/dwc-i2s.c
>> index c076090a9864..4dfbd8ddbcf5 100644
>> --- a/sound/soc/dwc/dwc-i2s.c
>> +++ b/sound/soc/dwc/dwc-i2s.c
>> @@ -16,6 +16,7 @@
>> #include <linux/init.h>
>> #include <linux/io.h>
>> #include <linux/interrupt.h>
>> +#include <linux/mfd/syscon.h>
>> #include <linux/module.h>
>> #include <linux/reset.h>
>> #include <linux/slab.h>
>> @@ -198,7 +199,7 @@ static void i2s_start(struct dw_i2s_dev *dev,
>> else
>> i2s_write_reg(dev->i2s_base, IRER, 1);
>> - if (dev->use_pio)
>> + if (dev->use_pio || dev->is_jh7110)
>> i2s_enable_irqs(dev, substream->stream, config->chan_nr);
>> else
>> i2s_enable_dma(dev, substream->stream);
>> @@ -216,7 +217,7 @@ static void i2s_stop(struct dw_i2s_dev *dev,
>> else
>> i2s_write_reg(dev->i2s_base, IRER, 0);
>> - if (dev->use_pio)
>> + if (dev->use_pio || dev->is_jh7110)
>> i2s_disable_irqs(dev, substream->stream, 8);
>> else
>> i2s_disable_dma(dev, substream->stream);
>
> Why do we need to enable interrupts for DMA mode?
This is special mechanism about data transmission by DMA controller on the
StarFive JH7110 SoC.
The DMA controller needs to make a handshake with I2S interrupt and cannot
move the audio data without enabling the I2S interrupt.
So I should keep the I2S interrupt enabled in both interrupt or DMA mode.
>
>> @@ -227,6 +228,21 @@ static void i2s_stop(struct dw_i2s_dev *dev,
>> }
>> }
>> +static int dw_i2s_startup(struct snd_pcm_substream *substream,
>> + struct snd_soc_dai *cpu_dai)
>> +{
>> + struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
>> +
>> + if (dev->is_jh7110) {
>> + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
>> + struct snd_soc_dai_link *dai_link = rtd->dai_link;
>> +
>> + dai_link->trigger_stop = SND_SOC_TRIGGER_ORDER_LDC;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> static void dw_i2s_config(struct dw_i2s_dev *dev, int stream)
>> {
>> u32 ch_reg;
>> @@ -267,6 +283,11 @@ static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
>> config->data_width = 16;
>> dev->ccr = 0x00;
>> dev->xfer_resolution = 0x02;
>> + /* Set DMA buswidth on JH7110 */
>> + if (dev->is_jh7110) {
>> + dev->play_dma_data.dt.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + dev->capture_dma_data.dt.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + }
>
> Not needed.
> See: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20230802&id=6f80197f40515853814d0f22e5209d53f899ab91
> Proper bus width calculations is performed by snd_hwparams_to_dma_slave_config()
Will use this ops instead.
>
>> break;
>> case SNDRV_PCM_FORMAT_S24_LE:
>> @@ -279,6 +300,11 @@ static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
>> config->data_width = 32;
>> dev->ccr = 0x10;
>> dev->xfer_resolution = 0x05;
>> + /* Set DMA buswidth on JH7110 */
>> + if (dev->is_jh7110) {
>> + dev->play_dma_data.dt.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
>> + dev->capture_dma_data.dt.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
>> + }
>
> Not needed
Will drop.
>
Thanks,
Xingyu Wu
Powered by blists - more mailing lists