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Message-ID: <9e851e2a-26c7-ba78-cb20-be4337b2916a@oracle.com>
Date: Fri, 4 Aug 2023 12:02:34 +0100
From: John Garry <john.g.garry@...cle.com>
To: Ilkka Koskinen <ilkka@...amperecomputing.com>,
Ian Rogers <irogers@...gle.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Will Deacon <will@...nel.org>, James Clark <james.clark@....com>,
Mike Leach <mike.leach@...aro.org>,
Leo Yan <leo.yan@...aro.org>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Adrian Hunter <adrian.hunter@...el.com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org,
Dave Kleikamp <dave.kleikamp@...cle.com>
Subject: Re: [PATCH 1/4] perf vendor events arm64: Remove L1D_CACHE_LMISS from
AmpereOne list
On 03/08/2023 22:13, Ilkka Koskinen wrote:
> amperene/cache.json file tried to include L1D_CACHE_LMISS while it
> doesn't exist in common-and-microarch.json. While this bug doesn't seem to
> cause issue in newer kernels with jevents.py script, it prevents building
> older perf tools with the backported patch.
jevents.py needs to be improved so it errors on these events which
cannot be fixed up, like it used to. I'll look to do that when I get a
chance.
>
> Fixes: a9650b7f6fc0 ("perf vendor events arm64: Add AmpereOne core PMU events")
> Reported-by: Dave Kleikamp <dave.kleikamp@...cle.com>
> Closes: https://urldefense.com/v3/__https://lore.kernel.org/all/76bb2e47-ce44-76ae-838e-53279047084d@oracle.com/__;!!ACWV5N9M2RV99hQ!IlO3yUW8jhm6wp8BJalODmD7WjzJleyREtTWS2pdn90Af5BD3P7g0fTGldbw15pSn49ycWiKpWDysjXw_ECS4XbbJQ$
> Signed-off-by: Ilkka Koskinen <ilkka@...amperecomputing.com>
Reviewed-by: John Garry <john.g.garry@...cle.com>
> ---
> tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> index fc0633054211..7a2b7b200f14 100644
> --- a/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> +++ b/tools/perf/pmu-events/arch/arm64/ampere/ampereone/cache.json
> @@ -92,9 +92,6 @@
> {
> "ArchStdEvent": "L1D_CACHE_LMISS_RD"
> },
> - {
> - "ArchStdEvent": "L1D_CACHE_LMISS"
> - },
> {
> "ArchStdEvent": "L1I_CACHE_LMISS"
> },
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