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Message-Id: <20230803-master-refactor-instructions-v4-v1-0-2128e61fa4ff@rivosinc.com>
Date: Thu, 03 Aug 2023 19:10:25 -0700
From: Charlie Jenkins <charlie@...osinc.com>
To: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org,
bpf@...r.kernel.org
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Peter Zijlstra <peterz@...radead.org>,
Josh Poimboeuf <jpoimboe@...nel.org>,
Jason Baron <jbaron@...mai.com>,
Steven Rostedt <rostedt@...dmis.org>,
Ard Biesheuvel <ardb@...nel.org>,
Anup Patel <anup@...infault.org>,
Atish Patra <atishp@...shpatra.org>,
Alexei Starovoitov <ast@...nel.org>,
Daniel Borkmann <daniel@...earbox.net>,
Andrii Nakryiko <andrii@...nel.org>,
Martin KaFai Lau <martin.lau@...ux.dev>,
Song Liu <song@...nel.org>, Yonghong Song <yhs@...com>,
John Fastabend <john.fastabend@...il.com>,
KP Singh <kpsingh@...nel.org>,
Stanislav Fomichev <sdf@...gle.com>,
Hao Luo <haoluo@...gle.com>, Jiri Olsa <jolsa@...nel.org>,
Björn Töpel <bjorn@...nel.org>,
Luke Nelson <luke.r.nels@...il.com>,
Xi Wang <xi.wang@...il.com>, Nam Cao <namcaov@...il.com>,
Charlie Jenkins <charlie@...osinc.com>
Subject: [PATCH 00/10] RISC-V: Refactor instructions
There are numerous systems in the kernel that rely on directly
modifying, creating, and reading instructions. Many of these systems
have rewritten code to do this. This patch will delegate all instruction
handling into insn.h and reg.h. All of the compressed instructions, RVI,
Zicsr, M, A instructions are included, as well as a subset of the F,D,Q
extensions.
---
This is modifying code that https://lore.kernel.org/lkml/20230731183925.152145-1-namcaov@gmail.com/
is also touching.
---
Testing:
There are a lot of subsystems touched and I have not tested every
individual instruction. I did a lot of copy-pasting from the RISC-V spec
so opcodes and such should be correct, but the construction of every
instruction is not fully tested.
vector: Compiled and booted
jump_label: Ensured static keys function as expected.
kgdb: Attempted to run the provided tests but they failed even without
my changes
module: Loaded and unloaded modules
patch.c: Ensured kernel booted
kprobes: Used a kprobing module to probe jalr, auipc, and branch
instructions
nommu misaligned addresses: Kernel boots
kvm: Ran KVM selftests
bpf: Kernel boots. Most of the instructions are exclusively used by BPF
but I am unsure of the best way of testing BPF.
Signed-off-by: Charlie Jenkins <charlie@...osinc.com>
---
Charlie Jenkins (10):
RISC-V: Expand instruction definitions
RISC-V: vector: Refactor instructions
RISC-V: Refactor jump label instructions
RISC-V: KGDB: Refactor instructions
RISC-V: module: Refactor instructions
RISC-V: Refactor patch instructions
RISC-V: nommu: Refactor instructions
RISC-V: kvm: Refactor instructions
RISC-V: bpf: Refactor instructions
RISC-V: Refactor bug and traps instructions
arch/riscv/include/asm/bug.h | 18 +-
arch/riscv/include/asm/insn.h | 2744 +++++++++++++++++++++++++++---
arch/riscv/include/asm/reg.h | 88 +
arch/riscv/kernel/jump_label.c | 13 +-
arch/riscv/kernel/kgdb.c | 13 +-
arch/riscv/kernel/module.c | 80 +-
arch/riscv/kernel/patch.c | 3 +-
arch/riscv/kernel/probes/kprobes.c | 13 +-
arch/riscv/kernel/probes/simulate-insn.c | 100 +-
arch/riscv/kernel/probes/uprobes.c | 5 +-
arch/riscv/kernel/traps.c | 9 +-
arch/riscv/kernel/traps_misaligned.c | 218 +--
arch/riscv/kernel/vector.c | 5 +-
arch/riscv/kvm/vcpu_insn.c | 281 +--
arch/riscv/net/bpf_jit.h | 707 +-------
15 files changed, 2825 insertions(+), 1472 deletions(-)
---
base-commit: 5d0c230f1de8c7515b6567d9afba1f196fb4e2f4
change-id: 20230801-master-refactor-instructions-v4-433aa040da03
--
- Charlie
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